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參數(shù)資料
| 型號： | IDT74ALVCH16843PA8 |
| 廠商： | INTEGRATED DEVICE TECHNOLOGY INC |
| 元件分類： | 總線收發(fā)器 |
| 英文描述： | ALVC/VCX/A SERIES, DUAL 9-BIT DRIVER, TRUE OUTPUT, PDSO56 |
| 封裝： | TSSOP-56 |
| 文件頁數(shù)： | 1/7頁 |
| 文件大?。?/td> | 69K |
| 代理商： | IDT74ALVCH16843PA8 |
INDUSTRIALTEMPERATURERANGE
IDT74ALVCH16843
3.3VCMOS18-BITBUS-INTERACED-TYPELATCHWITH3-STATEOUTPUTS
1
OCTOBER 1999
INDUSTRIAL TEMPERATURE RANGE
The IDT logo is a registered trademark of Integrated Device Technology, Inc.
1999 Integrated Device Technology, Inc.
DSC-5154/1
FEATURES:
0.5 MICRON CMOS Technology
Typical tSK(o) (Output Skew) < 250ps
ESD > 2000V per MIL-STD-883, Method 3015; > 200V using
machine model (C = 200pF, R = 0)
VCC = 3.3V ± 0.3V, Normal Range
VCC = 2.7V to 3.6V, Extended Range
VCC = 2.5V ± 0.2V
CMOS power levels (0.4
W typ. static)
Rail-to-Rail output swing for increased noise margin
Available in SSOP, TSSOP, and TVSOP packages
IDT74ALVCH16843
3.3V CMOS 18-BIT
BUS-INTERFACE D-TYPE
LATCH WITH 3-STATE OUT-
PUTS AND BUS-HOLD
DRIVE FEATURES:
High Output Drivers: ±24mA
Suitable for heavy loads
1Qx
1Dx
D
CLR
PRE
LE
1CLR
1PRE
1LE
1O E
2Q x
2Dx
D
CLR
PRE
LE
2CLR
2PRE
2LE
2O E
TO EIGHT OTHER CHANNELS
28
30
29
27
1
55
56
2
TO EIGHT OTHER CHANNELS
NO
T
RECOMMENDED
FOR
NEW
DESIGNS
FUNCTIONAL BLOCK DIAGRAM
DESCRIPTION:
The ALVCH16843 is built using advanced dual metal CMOS technology.
This device has two 9-bit D-type latches featuring separate D-type inputs for
eachlatchand3-stateoutputsforbusorientedapplications.Thetwosections
of each register are controlled independently by the latch enable (LE), clear
(CLR), preset (PRE) and output enable (OE) control pins.
When OE is low, the data in the registers appear at the outputs. When OE
is high, the outputs are in the high impedance OFF state. Operation of the OE
input does not affect the state of the flip-flops.
The ALVCH16843 has been designed with a ±24mA output driver. This
driveriscapableofdrivingamoderatetoheavyloadwhilemaintainingspeed
performance.
The ALVCH16843 has “bus-hold” which retains the inputs’ last state
whenevertheinputbusgoestoahighimpedance.Thispreventsfloatinginputs
andeliminatestheneedforpull-up/downresistors.
APPLICATIONS:
3.3V high speed systems
3.3V and lower voltage computing systems
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