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參數(shù)資料
| 型號： | IDT74ALVCH162374PA8 |
| 廠商： | INTEGRATED DEVICE TECHNOLOGY INC |
| 元件分類： | 總線收發(fā)器 |
| 英文描述： | ALVC/VCX/A SERIES, DUAL 8-BIT DRIVER, TRUE OUTPUT, PDSO48 |
| 封裝： | 0.50 MM PITCH, TSSOP-48 |
| 文件頁數(shù)： | 1/6頁 |
| 文件大?。?/td> | 72K |
| 代理商： | IDT74ALVCH162374PA8 |
INDUSTRIALTEMPERATURERANGE
IDT74ALVCH162374
3.3VCMOS16-BITEDGE-TRIGGEREDD-TYPEFLIP-FLOP
1
MARCH 1999
INDUSTRIAL TEMPERATURE RANGE
The IDT logo is a registered trademark of Integrated Device Technology, Inc.
1999 Integrated Device Technology, Inc.
DSC-4565/4
FEATURES:
0.5 MICRON CMOS Technology
Typical tSK(o) (Output Skew) < 250ps
ESD > 2000V per MIL-STD-883, Method 3015; > 200V using
machine model (C = 200pF, R = 0)
VCC = 3.3V ± 0.3V, Normal Range
VCC = 2.7V to 3.6V, Extended Range
VCC = 2.5V ± 0.2V
CMOS power levels (0.4
μμμμμ W typ. static)
Rail-to-Rail output swing for increased noise margin
Available in TSSOP package
FUNCTIONAL BLOCK DIAGRAM
DESCRIPTION:
This 16-bit edge-triggered D-type flip-flop is built using advanced dual metal
CMOStechnology.TheALVCH162374isparticularlysuitableforimplementing
bufferregisters,I/Oports,bidirectionalbusdrivers,andworkingregisters.Itcan
be used as two 8-bit flip-flops or one 16-bit flip-flop. On the positive transition of
the clock (CLK) input, the Q outputs of the flip-flop take on the logic levels set up
atthedata(D)inputs.
OEcanbeusedtoplacetheeightoutputsineitheranormal
logic state (high or low logic levels) or a high-impedance state. In the high-
impedance state, the outputs neither load nor drive the bus lines significantly.
The high-impedance state and the increased drive provide the capability to
drive bus lines without need for interface or pullup components.
OE does not
affect internal operations of the flip-flop. Old data can be retained or new data
can be entered while the outputs are in the high-impedance state.
TheALVCH162374hasseriesresistorsinthedeviceoutputstructurewhich
will significantly reduce line noise when used with light loads. This driver has
been designed to drive ±12mA at the designated threshold levels.
The ALVCH162374 has “bus-hold” which retains the inputs’ last state
whenevertheinputgoestoahighimpedance.Thispreventsfloatinginputsand
eliminates the need for pull-up/down resistor.
DRIVE FEATURES:
Balanced Output Drivers: ±12mA
Low switching noise
IDT74ALVCH162374
3.3V CMOS 16-BIT EDGE-
TRIGGERED D-TYPE FLIP-
FLOP WITH 3-STATE OUTPUTS
AND BUS-HOLD
1
OE
C1
1D
1
D1
47
1
CLK
1
Q1
TO 7 OTHER CHANNELS
2
OE
2
D1
36
2
CLK
2
Q1
TO 7 OTHER CHANNELS
1
48
2
24
25
13
C1
1D
APPLICATIONS:
3.3V high speed systems
3.3V and lower voltage computing systems
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| IDT74ALVCH162374PAG | 功能描述:IC FLIP FLOP 16BIT D 3ST 48TSSOP RoHS:是 類別:集成電路 (IC) >> 邏輯 - 觸發(fā)器 系列:74ALVCH 標準包裝:1 系列:74LVX 功能:主復位 類型:D 型總線 輸出類型:非反相 元件數(shù):1 每個元件的位元數(shù):8 頻率 - 時鐘:150MHz 延遲時間 - 傳輸:7.1ns 觸發(fā)器類型:正邊沿 輸出電流高，低:4mA，4mA 電源電壓:2 V ~ 3.6 V 工作溫度:-40°C ~ 85°C 安裝類型:表面貼裝 封裝/外殼:20-TSSOP（0.173"，4.40mm 寬） 包裝:Digi-Reel® 其它名稱:74LVX273MTCXDKR |
| IDT74ALVCH162374PAG8 | 功能描述:IC FLIP FLOP 16BIT D 3ST 48TSSOP RoHS:是 類別:集成電路 (IC) >> 邏輯 - 觸發(fā)器 系列:74ALVCH 標準包裝:1 系列:74LVX 功能:主復位 類型:D 型總線 輸出類型:非反相 元件數(shù):1 每個元件的位元數(shù):8 頻率 - 時鐘:150MHz 延遲時間 - 傳輸:7.1ns 觸發(fā)器類型:正邊沿 輸出電流高，低:4mA，4mA 電源電壓:2 V ~ 3.6 V 工作溫度:-40°C ~ 85°C 安裝類型:表面貼裝 封裝/外殼:20-TSSOP（0.173"，4.40mm 寬） 包裝:Digi-Reel® 其它名稱:74LVX273MTCXDKR |
| IDT74ALVCH162374PV | 制造商:Integrated Device Technology Inc 功能描述: |
| IDT74ALVCH16244PAG | 功能描述:IC BUFF DVR TRI-ST 16BIT 48TSSOP RoHS:是 類別:集成電路 (IC) >> 邏輯 - 緩沖器，驅(qū)動器，接收器，收發(fā)器 系列:74ALVCH 標準包裝:2,000 系列:74LVCH 邏輯類型:緩沖器/線路驅(qū)動器，非反相 元件數(shù):2 每個元件的位元數(shù):4 輸出電流高，低:24mA，24mA 電源電壓:1.65 V ~ 3.6 V 工作溫度:-40°C ~ 85°C 安裝類型:表面貼裝 封裝/外殼:20-SOIC（0.295"，7.50mm 寬） 供應商設備封裝:20-SOIC 包裝:帶卷 (TR) |
| IDT74ALVCH16244PAG8 | 功能描述:IC BUFF DVR TRI-ST 16BIT 48TSSOP RoHS:是 類別:集成電路 (IC) >> 邏輯 - 緩沖器，驅(qū)動器，接收器，收發(fā)器 系列:74ALVCH 標準包裝:47 系列:74LVX 邏輯類型:緩沖器/線路驅(qū)動器，非反相 元件數(shù):4 每個元件的位元數(shù):1 輸出電流高，低:4mA，4mA 電源電壓:2 V ~ 3.6 V 工作溫度:-40°C ~ 85°C 安裝類型:表面貼裝 封裝/外殼:14-SOIC（0.209"，5.30mm 寬） 供應商設備封裝:14-SOIC 包裝:管件 |
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