IDT72V3623/72V3633/72V3643 CMOS 3.3V SyncBiFIFOTM WITH B" />
參數(shù)資料
型號(hào): IDT72V3633L10PF
廠商: IDT, Integrated Device Technology Inc
文件頁數(shù): 18/28頁
文件大?。?/td> 0K
描述: IC FIFO SYNC 512X36 10NS 128TQFP
標(biāo)準(zhǔn)包裝: 72
系列: 72V
功能: 異步,同步
存儲(chǔ)容量: 18.4K(512 x 36)
數(shù)據(jù)速率: 100MHz
訪問時(shí)間: 10ns
電源電壓: 3 V ~ 3.6 V
工作溫度: 0°C ~ 70°C
安裝類型: 表面貼裝
封裝/外殼: 128-LQFP
供應(yīng)商設(shè)備封裝: 128-TQFP(14x20)
包裝: 托盤
其它名稱: 72V3633L10PF
25
COMMERCIAL TEMPERATURERANGE
IDT72V3623/72V3633/72V3643 CMOS 3.3V SyncBiFIFOTM WITH BUS-MATCHING
256 x 36, 512 x 36, 1,024 x 36
Figure 17. Timing for Mail1 Register and
MBF1
MBF1 Flag (IDT Standard and FWFT Modes)
NOTE:
1. If Port B is configured for word size, data can be written to the Mail1 Register using A0-A17 (A18-A35 are don't care inputs). In this first case B0-B17 will have valid data (B18-B35 will
be indeterminate). If Port B is configured for byte size, data can be written to the Mail1 Register using A0-A8
(A9-A35 are don't care inputs). In this second case, B0-B8 will have valid data (B9-B35 will be indeterminate).
NOTES:
1. tSKEW2 is the minimum time between a rising CLKA edge and a rising CLKB edge for
AF to transition HIGH in the next CLKA cycle. If the time between the rising CLKA edge and
rising CLKB edge is less than tSKEW2, then
AF may transition HIGH one CLKA cycle later than shown.
2. FIFO Write (
CSA = LOW, W/RA = HIGH, MBA = LOW), FIFO read (CSB = LOW, W/RB = HIGH, MBB = LOW). Data in the FIFO output register has been read from the FIFO.
3. D = Maximum FIFO Depth = 256 for the IDT72V3623, 512 for the IDT72V3633, 1,024 for the IDT72V3643.
4. If Port B size is word or byte, tSKEW2 is referenced from the rising CLKB edge that reads the last word or byte of the long word, respectively.
Figure 16. Timing for
AF
AF when the FIFO is Almost-Full (IDT Standard and FWFT Modes).
AF
CLKA
ENB
4662 drw 18
ENA
CLKB
12
tSKEW2
tENH
tPAF
tENH
tPAF
[D-(Y+1)] Words in FIFO
(D-Y) Words in FIFO
(1)
tENS2
4662 drw19
CLKA
ENA
A0-A35
MBA
CSA
W/RA
CLKB
MBF1
CSB
MBB
ENB
B0-B35
W/RB
tENH
tDS
tDH
tPMF
tENH
tDIS
tEN
tMDV
tPMR
FIFO Output Register
W1 (Remains valid in Mail1 Register after read)
tENH
W1
tENS1
tENS2
相關(guān)PDF資料
PDF描述
IDT723623L12PF IC FIFO SYNC 1KX9 12NS 128QFP
MS27497T12A22P CONN RCPT 22POS WALL MNT W/PINS
ISL26132AVZ IC ADC 24BIT SRL 80SPS 24TSSOP
IDT72V831L15TFI IC SYNC FIFO 2048X9 15NS 64QFP
IDT72V831L10TF IC SYNC FIFO 2048X9 10NS 64QFP
相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
IDT72V3633L10PF8 功能描述:IC FIFO SYNC 512X36 10NS 128TQFP RoHS:否 類別:集成電路 (IC) >> 邏輯 - FIFO 系列:72V 標(biāo)準(zhǔn)包裝:90 系列:7200 功能:同步 存儲(chǔ)容量:288K(16K x 18) 數(shù)據(jù)速率:100MHz 訪問時(shí)間:10ns 電源電壓:4.5 V ~ 5.5 V 工作溫度:0°C ~ 70°C 安裝類型:表面貼裝 封裝/外殼:64-LQFP 供應(yīng)商設(shè)備封裝:64-TQFP(14x14) 包裝:托盤 其它名稱:72271LA10PF
IDT72V3633L15PF 功能描述:IC FIFO SYNC 512X36 15NS 128TQFP RoHS:否 類別:集成電路 (IC) >> 邏輯 - FIFO 系列:72V 標(biāo)準(zhǔn)包裝:90 系列:7200 功能:同步 存儲(chǔ)容量:288K(16K x 18) 數(shù)據(jù)速率:100MHz 訪問時(shí)間:10ns 電源電壓:4.5 V ~ 5.5 V 工作溫度:0°C ~ 70°C 安裝類型:表面貼裝 封裝/外殼:64-LQFP 供應(yīng)商設(shè)備封裝:64-TQFP(14x14) 包裝:托盤 其它名稱:72271LA10PF
IDT72V3633L15PF8 功能描述:IC FIFO SYNC 512X36 15NS 128TQFP RoHS:否 類別:集成電路 (IC) >> 邏輯 - FIFO 系列:72V 標(biāo)準(zhǔn)包裝:90 系列:7200 功能:同步 存儲(chǔ)容量:288K(16K x 18) 數(shù)據(jù)速率:100MHz 訪問時(shí)間:10ns 電源電壓:4.5 V ~ 5.5 V 工作溫度:0°C ~ 70°C 安裝類型:表面貼裝 封裝/外殼:64-LQFP 供應(yīng)商設(shè)備封裝:64-TQFP(14x14) 包裝:托盤 其它名稱:72271LA10PF
IDT72V3634L10PF 功能描述:IC FIFO 512X36X2 10NS 128QFP RoHS:否 類別:集成電路 (IC) >> 邏輯 - FIFO 系列:72V 標(biāo)準(zhǔn)包裝:90 系列:7200 功能:同步 存儲(chǔ)容量:288K(16K x 18) 數(shù)據(jù)速率:100MHz 訪問時(shí)間:10ns 電源電壓:4.5 V ~ 5.5 V 工作溫度:0°C ~ 70°C 安裝類型:表面貼裝 封裝/外殼:64-LQFP 供應(yīng)商設(shè)備封裝:64-TQFP(14x14) 包裝:托盤 其它名稱:72271LA10PF
IDT72V3634L10PF8 功能描述:IC FIFO 512X36X2 10NS 128QFP RoHS:否 類別:集成電路 (IC) >> 邏輯 - FIFO 系列:72V 標(biāo)準(zhǔn)包裝:90 系列:7200 功能:同步 存儲(chǔ)容量:288K(16K x 18) 數(shù)據(jù)速率:100MHz 訪問時(shí)間:10ns 電源電壓:4.5 V ~ 5.5 V 工作溫度:0°C ~ 70°C 安裝類型:表面貼裝 封裝/外殼:64-LQFP 供應(yīng)商設(shè)備封裝:64-TQFP(14x14) 包裝:托盤 其它名稱:72271LA10PF