參數(shù)資料
型號: IDT70T653MS12BCI
廠商: INTEGRATED DEVICE TECHNOLOGY INC
元件分類: DRAM
英文描述: HIGH-SPEED 2.5V 512K x 36 ASYNCHRONOUS DUAL-PORT STATIC RAM WITH 3.3V 0R 2.5V INTERFACE
中文描述: 512K X 36 DUAL-PORT SRAM, 12 ns, PBGA256
封裝: BGA-256
文件頁數(shù): 15/24頁
文件大?。?/td> 309K
代理商: IDT70T653MS12BCI
15
IDT70T653M Preliminary
High-Speed 2.5V 512K x 36 Asynchronous Dual-Port Static RAM Industrial and Commercial Temperature Ranges
AC Electrical Characteristics Over the
Operating Temperature and Supply Voltage Range
NOTES:
1. Port-to-port delay through RAM cells from writing port to reading port, refer to Timing Waveform of Write with Port-to-Port Read.
2. To ensure that the earlier of the two ports wins.
3. t
BDD
is a calculated parameter and is the greater of the Max. spec, t
WDD
– t
WP
(actual), or t
DDD
– t
DW
(actual).
4. To ensure that the write cycle is inhibited on port "B" during contention on port "A".
5. To ensure that a write cycle is completed on port "B" after contention on port "A".
Symbol
Parameter
70T653MS10
Com'l Only
70T653MS12
Com'l
& Ind
70T653MS15
Com'l Only
Unit
Min.
Max.
Min.
Max.
Min.
Max.
BUSY
TIMING
t
WB
BUSY
Input to Write
(4)
0
____
0
____
0
____
ns
t
WH
Write Hold After
BUSY
(5)
7
____
9
____
12
____
ns
PORT-TO-PORT DELAY TIMING
t
WDD
Write Pulse to Data Delay
(1)
____
14
____
16
____
20
ns
t
DDD
Write Data Valid to Read Data Delay
(1)
____
14
____
16
____
20
ns
5679 tbl 15
Symbol
Parameter
70T65M3S10
Com'l Only
70T653MS12
Com'l
& Ind
70T6539MS15
Com'l Only
Min.
Max.
Min.
Max.
Min.
Max.
SLEEP MODE TIMING (ZZx=V
IH
)
t
ZZS
Sleep Mode Set Time
10
____
12
____
15
____
t
ZZR
Sleep Mode Reset Time
10
____
12
____
15
____
t
ZZPD
Sleep Mode Power Down Time
(4)
10
____
12
____
15
____
t
ZZPU
Sleep Mode Power Up Time
(4)
____
0
____
0
____
0
5679 tbl 15a
AC Electrical Characteristics Over the
Operating Temperature and Supply Voltage Range
(1,2,3)
NOTES:
1. Timing is the same for both ports.
2. The sleep mode pin shuts off all dynamic inputs, except JTAG inputs, when asserted. OPTx,
INT
x and the sleep mode pins themselves (ZZx) are not affected
during sleep mode. It is recommended that boundary scan not be operated during sleep mode.
3. These values are valid regardless of the power supply level selected for I/O and control signals (3.3V/2.5V). See page 6 for details.
4. This parameter is guaranteed by device characterization, but is not production tested.
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