參數(shù)資料
型號: IDT5V2528APGI
廠商: INTEGRATED DEVICE TECHNOLOGY INC
元件分類: 時鐘及定時
英文描述: 2.5V / 3.3V PHASE-LOCK LOOP CLOCK DRIVER ZERO DELAY BUFFER
中文描述: 5V SERIES, PLL BASED CLOCK DRIVER, 10 TRUE OUTPUT(S), 0 INVERTED OUTPUT(S), PDSO28
封裝: TSSOP-28
文件頁數(shù): 6/7頁
文件大?。?/td> 61K
代理商: IDT5V2528APGI
6
INDUSTRIAL TEMPERATURE RANGE
IDT5V2528/A
2.5 / 3.3V PHASE-LOCK LOOP CLOCK DRIVER
From Output
Under Test
500
C
L
=30pF
(2)
CLK
t
PHASE ERROR
FBIN
V
DDQ
/2
V
DDQ
/2
t
SK1(o)
Any Y, TY (3.3V)
Any TY (2.5V)
t
SK2(o)
V
DDQ
/2
V
DDQ
/2
Any TY (2.5V)
V
DDQ
/2
V
DDQ
/2
t
SK3(o)
t
R
80%
20%
t
F
t
F
80%
20%
t
R
V
DD
/2
V
DD
/2
FBOUT
or
Any Y, TY (3.3V)
From Output
Under Test
500
C
L
=20pF
(2)
Y, TY
C
F
F
BIN
CLK
IDT5V2528/A
F
BOUT
PCB
TRACE
C
L
(2)
500
on each Y,
TY output
(4)
500
TEST CIRCUIT AND VOLTAGE WAV EFORMS
PHASE ERROR AND SKEW CALCULATIONS
(3,4)
Test Circuit for 3.3V Outputs
Test Circuit for 2.5V Outputs
NOTES:
1. All inputs pulses are supplied by generators having the following characteristics: P
RR
100MHz Z
O
= 50
, t
R
1.2 ns, t
F
1.2 ns.
2. C
L
includes probe and jig capacitance.
3. The outputs are measured one at a time with one transition per measurement.
4. Phase error measurements require equal loading at outputs Y, TY, and F
BOUT
. C
F
= C
L
C
FBIN
C
PCB
trace
; C
FBIN
5pF.
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