參數(shù)資料
型號(hào)： IDT5T915PAI
廠商： INTEGRATED DEVICE TECHNOLOGY INC
元件分類： 時(shí)鐘及定時(shí)
英文描述： 2.5V DIFFERENTIAL 1:5 CLOCK BUFFER TERABUFFER
中文描述： 5T SERIES, LOW SKEW CLOCK DRIVER, 5 TRUE OUTPUT(S), 0 INVERTED OUTPUT(S), PDSO48
封裝： TSSOP-48
文件頁(yè)數(shù)： 6/19頁(yè)
文件大?。?/td> 127K
代理商： IDT5T915PAI
INDUSTRIAL TEMPERATURE RANGE
6
IDT5T915
2.5V DIFFERENTIAL 1:5 CLOCK BUFFER TERABUFFER
DIFFERENT IAL INPUT AC T ES T CONDIT IONS FOR HS T L
Symbol
Parameter
V
DIF
Input Signal Swing
(1)
V
X
Differential Input Signal Crossing Point
(2)
V
THI
Input Timng Measurement Reference Level
(3)
t
R
, t
F
Input Signal Edge Rate
(4)
NOTES:
1. The 1V peak-to-peak input pulse level is specified to allow consistent, repeatable results in an automatic test equipment (ATE) environment. Compliant devices must meet the
V
DIF
(AC) specification under actual use conditions.
2. A 750mV crossing point level is specified to allow consistent, repeatable results in an automatic test equipment (ATE) environment. Compliant devices must meet the V
X
specification
under actual use conditions.
3. In all cases, input waveformtimng is marked at the differential cross-point of the input signals.
4. The input signal edge rate of 1V/ns or greater is to be maintained in the 20% to 80% range of the input waveform
Value
1
750
Units
V
mV
V
V/ns
Crossing Point
1
DC ELECTRICAL CHARACTERISTICS OV ER OPERATING RANGE FOR eHSTL
(1)
Symbol
Parameter
Test Conditions
Input Characteristics
I
IH
Input HIGH Current
(9)
V
DD
= 2.6V
I
IL
Input LOW Current
(9)
V
DD
= 2.6V
V
IK
Clamp Diode Voltage
V
DD
= 2.4V, I
IN
= -18mA
V
IN
DC Input Voltage
V
DIF
DC Differential Voltage
(2,8)
V
CM
DC Common Mode Input Voltage
(3,8)
V
IH
DC Input HIGH
(4,5,8)
V
IL
DC Input LOW
(4,6,8)
V
REF
Single-Ended Reference Voltage
(4,8)
Output Characteristics
V
OH
Output HIGH Voltage
I
OH
= -8mA
I
OH
= -100
μ
A
V
OL
Output LOW Voltage
I
OL
= 8mA
I
OL
= 100
μ
A
Min.
Typ.
(7)
Max
Unit
V
I
= V
DDQ
/GND
V
I
= GND/V
DDQ
—
—
—
- 0.3
0.2
800
—
—
- 0.7
±5
±5
- 1.2
+3.6
—
1000
—
μ
A
V
V
V
900
mV
mV
mV
mV
V
REF
+ 100
—
—
V
REF
- 100
—
900
V
DDQ
- 0.4
V
DDQ
- 0.1
—
—
—
—
0.4
0.1
V
V
V
V
NOTES:
1. See RECOMMENDED OPERATING RANGE table.
2. V
DIF
specifies the mnimuminput differential voltage (V
TR
- V
CP
) required for switching where V
TR
is the "true" input level and V
CP
is the "complement" input level. Differential mode
only. The DC differential voltage must be maintained to guarantee retaining the existing HIGH or LOW input. The AC differential voltage must be achieved to guarantee switching
to a new state.
3. V
CM
specifies the maximumallowable range of (V
TR
+ V
CP
) /2. Differential mode only.
4. For single-ended operation, in a differential mode,
A
/V
REF
is tied to the DC voltage V
REF
.
5. Voltage required to maintain a logic HIGH, single-ended operation in differential mode.
6. Voltage required to maintain a logic LOW, single-ended operation in differential mode.
7. Typical values are at V
DD
= 2.5V, V
DDQ
= 1.8V, +25°C ambient.
8. The reference clock input is capable of HSTL, eHSTL, LVEPECL, 1.8V or 2.5V LVTTL operation independent of the device output. The correct input interface table should be
referenced.
9. For differential mode (RxS = LOW), A and
A
/V
REF
must be at the opposite rail.
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