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參數(shù)資料
| 型號： | ICSXXXXYFLFT |
| 英文描述： | 26/SKT/TB/2R/10AVE/90:10 |
| 中文描述： | 系統(tǒng)時鐘芯片的支持ATI RS400 P4TM的系統(tǒng) |
| 文件頁數(shù)： | 9/19頁 |
| 文件大?。?/td> | 206K |
| 代理商： | ICSXXXXYFLFT |
9
Integrated
Circuit
Systems, Inc.
ICS951411
0891E—03/07/05
SMBus Table: SRCCLK(7:3,0), CLKREQA# Output Control Register
Pin #
Name
Bit 7
SRCCLK7
Bit 6
SRCCLK6
Bit 5
SRCCLK5
Bit 4
SRCCLK4
Bit 3
SRCCLK3
Bit 2
SRCCLK0
34,33
Control Function
Type
RW
RW
RW
RW
RW
RW
0
1
PWD
1
1
1
1
1
1
Disable
Disable
Disable
Disable
Disable
Disable
Does not
control
Does not
control
Enable
Enable
Enable
Enable
Enable
Enable
Bit 1
REQASRC3
CLKREQA# Controls
SRC3
CLKREQA# Controls
SRC0
RW
Controls
0
Bit 0
REQASRC0
RW
Controls
0
SMBus Table: SRCCLK(3,0), ATIGCLK Output Control Register
Pin #
Name
Byte 4
Control Function
CLKREQA# Controls
SRC7
CLKREQA# Controls
SRC6
CLKREQA# Controls
SRC5
CLKREQA# Controls
SRC4
Output Enable
These outputs cannot be
controlled by CLKREQ#
pins.
Type
0
1
PWD
Bit 7
REQASRC7
RW
Does not
control
Does not
control
Does not
control
Does not
control
Controls
0
Bit 6
REQASRC6
RW
Controls
0
Bit 5
REQASRC5
RW
Controls
0
Bit 4
REQASRC4
RW
Controls
0
Bit 3
ATIGCLK1
RW
Disabled
Enabled
1
Bit 2
ATIGCLK0
RW
Disabled
Enabled
1
Bit 1
Differential Output
Disable Mode
Hi-Z or driven when
disabled
RW
Driven
Hi-Z
0
Bit 0
USB_48Str
48MHz Strength Control
RW
1X
2X
1
Note: Do NOT simultaneously select CLKREQA# and CLKREQB# to control an SRC output.
Behavior of the device is undefined under these conditions.
SMBus Table: Output Drive and ATIG Frequency Control Register
Pin #
Name
Bit 7
REF2Str
Bit 6
CPU2_Stop_En
Bit 5
CPU1_Stop_En
SRCFS4
(SS_EN)
Bit 3
SRCFS3
Bit 2
SRCFS2
Bit 1
SRCFS1
Bit 0
SRCFS0
NOTE: CPU(1:2)_Stop_En (Byte5, bit 6:5) only exist in devices with REV ID = 2 or higher
Control Function
REF2 Strength Control
0 = CPU is free-run
1 = CPU is stopped by
Type
RW
RW
RW
0
1
PWD
1
1
1
1X
2X
Free-Run
Free-Run
Stoppable
Stoppable
Bit 4
Freq Select Bit 4
(SS_EN)
Freq Select Bit 3
Freq Select Bit 2
Freq Select Bit 1
Freq Select Bit 0
RW
0
RW
RW
RW
RW
0
0
0
0
See Table 2 SRC
Frequency Selection
-
-
-
-
-
Byte 5
52
41,40
43,42
30,29
CPU, SRC,
ATIG
4
16,17
18,19
22,23
27,28
24,25
34,33
12,13
Master Output control.
Enables or disables
output, regardless of
CLKREQ# inputs.
16,17
18,19
22,23
24,25
Byte 3
12,13
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| ICSXXXXYGLFT | System Clock Chip for ATI RS400 P4TM-based Systems |
| ICS951412YGLFT | System Clock Chip for ATI RS480 K8-based Systems |
| ICS951412 | 16-Bit Buffers/Drivers With 3-State Outputs 48-TSSOP -40 to 85 |
| ICS951412YFLFT | System Clock Chip for ATI RS480 K8-based Systems |
| ICS951601 | General Purpose Frequency Timing Generator |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| ICSXXXXYGLFT | 制造商:ICS 制造商全稱:ICS 功能描述:System Clock Chip for ATI RS400 P4TM-based Systems |
| IC-SY WK1D | 制造商:LASER COMPONENTS 功能描述:DEVELOPMENT KIT LD DRIVER |
| ICT-075-A-10.0-G | 制造商:Interconnect Devices Inc (IDI) 功能描述:contact probe, .075' CTR 3 amp, concave 90 deg |
| ICT-075-A-10-G S/C | 功能描述:觸點(diǎn)探頭 .075’ CTR 3AMP PROBE HEADED 90 DEG CNCAVE RoHS:否 制造商:IDI 類型:Probes 尖端類型:Spherical Radius 長度:8.26 mm 電流額定值:10 A 彈力:2.3 oz 行程:1.52 mm 系列:101050 |
| ICT-075-A-5-G | 制造商:Interconnect Devices Inc (IDI) 功能描述:SPRING CONTACT PROBE |
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