參數(shù)資料
型號(hào): ICS954101
英文描述: 16-Bit Registered Transceivers With 3-State Outputs 56-TSSOP -40 to 85
中文描述: 可編程定時(shí)控制中心系統(tǒng)的臺(tái)式機(jī)P4
文件頁(yè)數(shù): 3/16頁(yè)
文件大?。?/td> 132K
代理商: ICS954101
3
Integrated
Circuit
Systems, Inc.
ICS954101
0815D—06/21/04
Pin Description (Continued)
Pin #
29
30
31
32
33
34
PIN NAME
TYPE
PWR
OUT
OUT
OUT
OUT
PWR
DESCRIPTION
GND
SRCCLKC5
SRCCLKT5
SRCCLKC6
SRCCLKT6
VDDSRC
Ground pin.
Complement clock of differential SRC clock pair.
True clock of differential SRC clock pair.
Complement clock of differential SRC clock pair.
True clock of differential SRC clock pair.
Supply for SRC clocks, 3.3V nominal
Complimentary clock of CPU_ITP/SRC differential pair CPU_ITP/SRC
output. These are current mode outputs. External resistors are required
for voltage bias. Selected by ITP_EN input.
True clock of CPU_ITP/SRC differential pair CPU_ITP/SRC output. These
are current mode outputs. External resistors are required for voltage bias.
Selected by ITP_EN input.
3.3V power for the PLL core.
Ground pin for the PLL core.
35
CPUCLKC2_ITP/SRCCLKC_7
OUT
36
CPUCLKT2_ITP/SRCCLKT_7
OUT
37
38
VDDA
GNDA
PWR
PWR
39
IREF
OUT
This pin establishes the reference current for the differential current-mode
output pairs. This pin requires a fixed precision resistor tied to ground in
order to establish the appropriate current. 475 ohms is the standard value.
40
CPUCLKC1
OUT
Complimentary clock of differential pair CPU outputs. These are current
mode outputs. External resistors are required for voltage bias.
41
CPUCLKT1
OUT
True clock of differential pair CPU outputs. These are current mode
outputs. External resistors are required for voltage bias.
Supply for CPU clocks, 3.3V nominal
42
VDDCPU
PWR
43
CPUCLKC0
OUT
Complimentary clock of differential pair CPU outputs. These are current
mode outputs. External resistors are required for voltage bias.
44
CPUCLKT0
OUT
True clock of differential pair CPU outputs. These are current mode
outputs. External resistors are required for voltage bias.
Ground pin.
Clock pin of SMBus circuitry, 5V tolerant.
Data pin for SMBus circuitry, 5V tolerant.
Ref, XTAL power supply, nominal 3.3V
Crystal output, Nominally 14.318MHz
Crystal input, Nominally 14.318MHz.
Ground pin.
Reference Clock output
45
46
47
48
49
50
51
52
GND
SCLK
SDATA
VDDREF
X2
X1
GND
REFOUT
PWR
IN
I/O
PWR
OUT
IN
PWR
OUT
53
FS_C/TEST_SEL
IN
3.3V tolerant input for CPU frequency selection. Low voltage threshold
inputs, see input electrical characteristics for Vil_FS and Vih_FS values.
TEST_Sel: 3-level latched input to enable test mode.
Refer to Test Clarification Table
54
55
56
PCICLK0
PCICLK1
PCICLK2
OUT
OUT
OUT
PCI clock output.
PCI clock output.
PCI clock output.
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ICS954101DFLF 功能描述:IC TIMING CTRL HUB P4 56-SSOP RoHS:是 類別:集成電路 (IC) >> 時(shí)鐘/計(jì)時(shí) - 專用 系列:TCH™, PCI Express® (PCIe) 標(biāo)準(zhǔn)包裝:28 系列:- 類型:時(shí)鐘/頻率發(fā)生器 PLL:是 主要目的:Intel CPU 服務(wù)器 輸入:時(shí)鐘 輸出:LVCMOS 電路數(shù):1 比率 - 輸入:輸出:3:22 差分 - 輸入:輸出:無(wú)/是 頻率 - 最大:400MHz 電源電壓:3.135 V ~ 3.465 V 工作溫度:0°C ~ 85°C 安裝類型:表面貼裝 封裝/外殼:64-TFSOP (0.240",6.10mm 寬) 供應(yīng)商設(shè)備封裝:64-TSSOP 包裝:管件
ICS954101DFLFT 功能描述:IC CTRL HUB PROGR TIMING 56-SSOP RoHS:是 類別:集成電路 (IC) >> 時(shí)鐘/計(jì)時(shí) - 專用 系列:TCH™, PCI Express® (PCIe) 標(biāo)準(zhǔn)包裝:28 系列:- 類型:時(shí)鐘/頻率發(fā)生器 PLL:是 主要目的:Intel CPU 服務(wù)器 輸入:時(shí)鐘 輸出:LVCMOS 電路數(shù):1 比率 - 輸入:輸出:3:22 差分 - 輸入:輸出:無(wú)/是 頻率 - 最大:400MHz 電源電壓:3.135 V ~ 3.465 V 工作溫度:0°C ~ 85°C 安裝類型:表面貼裝 封裝/外殼:64-TFSOP (0.240",6.10mm 寬) 供應(yīng)商設(shè)備封裝:64-TSSOP 包裝:管件
ICS954101DGLF 功能描述:IC TIMING CTRL HUB P4 56-TSSOP RoHS:是 類別:集成電路 (IC) >> 時(shí)鐘/計(jì)時(shí) - 專用 系列:TCH™, PCI Express® (PCIe) 標(biāo)準(zhǔn)包裝:28 系列:- 類型:時(shí)鐘/頻率發(fā)生器 PLL:是 主要目的:Intel CPU 服務(wù)器 輸入:時(shí)鐘 輸出:LVCMOS 電路數(shù):1 比率 - 輸入:輸出:3:22 差分 - 輸入:輸出:無(wú)/是 頻率 - 最大:400MHz 電源電壓:3.135 V ~ 3.465 V 工作溫度:0°C ~ 85°C 安裝類型:表面貼裝 封裝/外殼:64-TFSOP (0.240",6.10mm 寬) 供應(yīng)商設(shè)備封裝:64-TSSOP 包裝:管件
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ICS954101YFLFT 制造商:ICS 制造商全稱:ICS 功能描述:Programmable Timing Control Hub for Desktop P4 Systems