- 您現(xiàn)在的位置：買賣IC網(wǎng) > PDF目錄360786 > ICS952607YFLF-T Circular Connector; MIL SPEC:MIL-DTL-38999 Series III; Body Material:Metal; Series:TV01; Number of Contacts:6; Connector Shell Size:9; Connecting Termination:Crimp; Circular Shell Style:Straight Receptacle; Body Style:Straight PDF資料下載
參數(shù)資料
| 型號： | ICS952607YFLF-T |
| 元件分類： | 圓形連接器 |
| 英文描述： | Circular Connector; MIL SPEC:MIL-DTL-38999 Series III; Body Material:Metal; Series:TV01; Number of Contacts:6; Connector Shell Size:9; Connecting Termination:Crimp; Circular Shell Style:Straight Receptacle; Body Style:Straight |
| 中文描述： | 可編程定時控制中心，為下一代P4處理器 |
| 文件頁數(shù)： | 2/21頁 |
| 文件大小： | 214K |
| 代理商： | ICS952607YFLF-T |
2
Integrated
Circuit
Systems, Inc.
ICS952607
Advance Information
0734—07/16/04
Pin Description
PIN
#
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
PIN NAME
PIN TYPE
DESCRIPTION
*FS1/REF0
*FS0/REF1
REF2
VDDREF
X1
X2
GND
**FS2/PCICLK_F0
**FS4/PCICLK_F1
PCICLK_F2
VDDPCI
GND
^^PCICLK0
PCICLK1
PCICLK2
PCICLK3
VDDPCI
GND
PCICLK4
PCICLK5
I/O
I/O
OUT
PWR
IN
OUT
PWR
I/O
I/O
OUT
PWR
PWR
OUT
OUT
OUT
OUT
PWR
PWR
OUT
OUT
Frequency select latch input pin / 14.318 MHz reference clock.
Frequency select latch input pin / 14.318 MHz reference clock.
14.318 MHz reference clock.
Ref, XTAL power supply, nominal 3.3V
Crystal input,nominally 14.318MHz.
Crystal output, Nominally 14.318MHz
Ground pin.
Frequency select latch input pin / 3.3V PCI free running clock output.
Frequency select latch input pin / 3.3V PCI free running clock output.
Free running PCI clock not affected by PCI_STOP# .
Power supply for PCI clocks, nominal 3.3V
Ground pin.
PCI clock output.
PCI clock output.
PCI clock output.
PCI clock output.
Power supply for PCI clocks, nominal 3.3V
Ground pin.
PCI clock output.
PCI clock output.
Latched select input for 24/48MHz output / 24/48MHz clock output. 1=24mHz, 0 =
48MHz.
Frequency select latch input pin / Fixed 48MHz clock output. 3.3V
48MHz clock output.
Ground pin.
Power for 24 & 48MHz output buffers and fixed PLL core.
3.3V 66.66MHz clock output / 48MHz VCH clock output.
3.3V 66.66MHz clock output
Power pin for the 3V66 clocks.
Ground pin.
3.3V 66.66MHz clock output
3.3V 66.66MHz clock output
Clock pin of I2C circuitry 5V tolerant
Data pin for I2C circuitry 5V tolerant
21
**Sel24_48#/24_48MHz
I/O
22
23
24
25
26
27
28
29
30
31
32
33
**FS3/48MHz_0
48MHz_1
GND
VDD48
3V66_3/VCH
3V66_2
VDD3V66
GND
3V66_1
3V66_0
SCLK
SDATA
I/O
OUT
PWR
PWR
OUT
OUT
PWR
PWR
OUT
OUT
IN
I/O
34
VttPWR_GD/PD#
IN
This 3.3V LVTTL input is a level sensitive strobe used to determine when latch inputs
are valid and are ready to be sampled. This is an active high input. / Asynchronous
active low input pin used to power down the device into a low power state.
35
VDD
PWR
Power supply, nominal 3.3V
Complement clock of differential pair for S-ATA support.
+/- 300ppm accuracy required.
True clock of differential pair for S-ATA support.
+/- 300ppm accuracy required.
Ground pin.
"Complementary" clocks of differential pair CPU outputs. These are current mode
outputs. External resistors are required for voltage bias.
"True" clocks of differential pair CPU outputs. These are current mode outputs.
External resistors are required for voltage bias.
Supply for CPU clocks, 3.3V nominal
"Complementary" clocks of differential pair CPU outputs. These are current mode
outputs. External resistors are required for voltage bias.
"True" clocks of differential pair CPU outputs. These are current mode outputs.
External resistors are required for voltage bias.
Ground pin.
Real time system reset signal for frequency gear ratio change or watchdog timer
timeout. This signal is active low.
This pin establishes the reference current for the CPUCLK pairs. This pin requires a
fixed precision resistor tied to ground in order to establish the appropriate current.
Ground pin.
3.3V power for the PLL core.
36
SRCCLKC
OUT
37
SRCCLKT
OUT
38
GND
PWR
39
CPUCLKC0
OUT
40
CPUCLKT0
OUT
41
VDDCPU
PWR
42
CPUCLKC1
OUT
43
CPUCLKT1
OUT
44
GND
PWR
45
Reset#
OUT
46
IREF
OUT
47
48
GND
VDDA
PWR
PWR
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| ICS952607 | 16-Bit Buffers/Drivers With 3-State Outputs 48-SSOP -40 to 85 |
| ICS952621 | Programmable Timing Control Hub⑩ for Next Gen P4⑩ processor |
| ICS952702 | Programmable Timing Control Hub for K7 System |
| ICS952703 | Programmable Timing Control Hub for K7 System |
| ICS952801 | Programmable Timing Control HubTM for K8TM processor |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| ICS952620CFLF | 功能描述:IC TIMING CTRL HUB P4 48-SSOP RoHS:是 類別:集成電路 (IC) >> 時鐘/計時 - 專用 系列:- 標準包裝:1,500 系列:- 類型:時鐘緩沖器/驅(qū)動器 PLL:是 主要目的:- 輸入:- 輸出:- 電路數(shù):- 比率 - 輸入:輸出:- 差分 - 輸入:輸出:- 頻率 - 最大:- 電源電壓:3.3V 工作溫度:0°C ~ 70°C 安裝類型:表面貼裝 封裝/外殼:28-SSOP（0.209"，5.30mm 寬） 供應(yīng)商設(shè)備封裝:28-SSOP 包裝:帶卷 (TR) 其它名稱:93786AFT |
| ICS952620CFLFT | 功能描述:IC TIMING CTRL HUB P4 48-SSOP RoHS:是 類別:集成電路 (IC) >> 時鐘/計時 - 專用 系列:- 標準包裝:1,500 系列:- 類型:時鐘緩沖器/驅(qū)動器 PLL:是 主要目的:- 輸入:- 輸出:- 電路數(shù):- 比率 - 輸入:輸出:- 差分 - 輸入:輸出:- 頻率 - 最大:- 電源電壓:3.3V 工作溫度:0°C ~ 70°C 安裝類型:表面貼裝 封裝/外殼:28-SSOP（0.209"，5.30mm 寬） 供應(yīng)商設(shè)備封裝:28-SSOP 包裝:帶卷 (TR) 其它名稱:93786AFT |
| ICS952621 | 制造商:ICS 制造商全稱:ICS 功能描述:Programmable Timing Control Hub⑩ for Next Gen P4⑩ processor |
| ICS952623 | 制造商:ICS 制造商全稱:ICS 功能描述:Programmable Timing Control Hub for Next Gen P4 processor |
| ICS952623YFT | 制造商:ICS 制造商全稱:ICS 功能描述:Programmable Timing Control Hub for Next Gen P4 processor |
發(fā)布緊急采購，3分鐘左右您將得到回復(fù)。