- 您現(xiàn)在的位置：買賣IC網(wǎng) > PDF目錄360786 > ICS950812YGLFT Frequency Generator with 200MHz Differential CPU Clocks PDF資料下載
參數(shù)資料
| 型號： | ICS950812YGLFT |
| 英文描述： | Frequency Generator with 200MHz Differential CPU Clocks |
| 中文描述： | 頻率發(fā)生器200MHz的CPU的時鐘差分 |
| 文件頁數(shù)： | 3/29頁 |
| 文件大?。?/td> | 225K |
| 代理商： | ICS950812YGLFT |
第1頁第2頁當(dāng)前第3頁第4頁第5頁第6頁第7頁第8頁第9頁第10頁第11頁第12頁第13頁第14頁第15頁第16頁第17頁第18頁第19頁第20頁第21頁第22頁第23頁第24頁第25頁第26頁第27頁第28頁第29頁
3
ICS950812
0542G—08/21/03
Pin Configuration (Continued)
PIN # PIN NAME
29
SDATA
30
SCLK
31
GND
32
VDD3V66
33
3V66_0/FS5**
PIN TYPE
I/O
DESCRIPTION
Data pin for I2C circuitry 5V tolerant
Clock pin of I2C circuitry 5V tolerant
Ground pin.
Power pin for the 3V66 clocks.
Frequency select latch input pin / 3.3V 66.66MHz clock output.
Stops all PCICLKs besides the PCICLK_F clocks at logic 0 level, when input
low
Frequency select latch input pin / 3.3V 66.66MHz clock output / 48MHz
VCH clock output.
Ground pin.
Power pin for the 48MHz output.3.3V
48MHz clock output.
Frequency select latch input pin / 3.3V 48MHz clock output.
Frequency select pin.
Ground pin.
IN
PWR
PWR
I/O
34
PCI_STOP#*
IN
35
3V66_1/VCH_CLK/FS4**
I/O
36
37
38
39
40
41
GND
VDD48
48MHz_DOT
48MHz_USB/FS3**
FS2
GND
PWR
PWR
OUT
I/O
IN
PWR
42
IREF
OUT
This pin establishes the reference current for the differential current-mode
output pairs. This pin requires a fixed precision resistor tied to ground in
order to establish the appropriate current. 475 ohms is the standard value.
43
MULTSEL*
IN
3.3V LVTTL input for selection the current multiplier for CPU outputs
Complimentary clock of differential pair CPU outputs. These are current
mode outputs. External resistors are required for voltage bias.
True clock of differential pair CPU outputs. These are current mode
outputs. External resistors are required for voltage bias.
Supply for CPU clocks, 3.3V nominal
Ground pin.
Complimentary clock of differential pair CPU outputs. These are current
mode outputs. External resistors are required for voltage bias.
True clock of differential pair CPU outputs. These are current mode
outputs. External resistors are required for voltage bias.
Supply for CPU clocks, 3.3V nominal
Complimentary clock of differential pair CPU outputs. These are current
mode outputs. External resistors are required for voltage bias.
True clock of differential pair CPU outputs. These are current mode
outputs. External resistors are required for voltage bias.
Stops all CPUCLK besides the free running clocks
Frequency select pin.
Frequency select pin.
14.318 MHz reference clock.
44
CPUCLKC2
OUT
45
CPUCLKT2
OUT
46
47
VDDCPU
GND
PWR
PWR
48
CPUCLKC1
OUT
49
CPUCLKT1
OUT
50
VDDCPU
PWR
51
CPUCLKC0
OUT
52
CPUCLKT0
OUT
53
54
55
56
CPU_STOP#*
FS0
FS1
REF
IN
IN
IN
OUT
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| ICS950812 | Frequency Generator with 200MHz Differential CPU Clocks |
| ICS950812YFLFT | LED STANDARD GREEN 3MM T-1 |
| ICS950813 | Frequency Generator with 200MHz Differential CPU Clocks |
| ICS950813YFT | Frequency Generator with 200MHz Differential CPU Clocks |
| ICS950813YGT | Frequency Generator with 200MHz Differential CPU Clocks |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| ICS950813 | 制造商:ICS 制造商全稱:ICS 功能描述:Frequency Generator with 200MHz Differential CPU Clocks |
| ICS950813YFT | 制造商:ICS 制造商全稱:ICS 功能描述:Frequency Generator with 200MHz Differential CPU Clocks |
| ICS950813YGT | 制造商:ICS 制造商全稱:ICS 功能描述:Frequency Generator with 200MHz Differential CPU Clocks |
| ICS950818 | 制造商:ICS 制造商全稱:ICS 功能描述:Frequency Generator with 200MHz Differential CPU Clocks |
| ICS950818YG-T | 制造商:ICS 制造商全稱:ICS 功能描述:Frequency Generator with 200MHz Differential CPU Clocks |
發(fā)布緊急采購，3分鐘左右您將得到回復(fù)。