參數(shù)資料
型號: ICS950201GLF-T
英文描述: Programmable Timing Control Hub⑩ for P4⑩
中文描述: 可編程定時(shí)控制中心,為小四至⑩⑩
文件頁數(shù): 12/16頁
文件大?。?/td> 206K
代理商: ICS950201GLF-T
12
Integrated
Circuit
Systems, Inc.
ICS950201
0460G—08/31/04
All 3V66 clocks are to be in pphase with each other. In the case where 3V66_1 is configured as 48MHz VCH clock, there is no
defined phase relationship between 3V66_1/VCH and other 3V66 clocks. The PCI group should lag 3V66 by the standard skew
described below as Tpci.
Un-Buffered Mode 3V66 & PCI Phase Relationship
3V66 (1:0)
3V66 (4:2)
3V66_5
PCICLK_F (2:0) PCICLK (6:0)
Tpci
Group Skews at Common Transition Edges: (Un-Buffered Mode)
GROUP
SYMBOL
3V66
3V66
3V66 pin to pin skew
PCI
PCI
PCI_F and PCI pin to pin skew
3V66 to PCI
S
3V66-PCI
3V66 leads 33MHz PCI
1
Guaranteed by design, not 100% tested in production.
CONDITIONS
MIN
0
0
1.5
TYP
MAX
500
500
3.5
UNITS
ps
ps
ns
PD# Functionality
#
P
O
T
S
_
U
P
C
T
U
P
C
C
U
P
C
6
6
V
3
T
U
O
_
z
H
M
6
6
F
_
K
K
L
L
C
C
I
I
C
P
P
C
K
L
C
I
C
P
T
O
z
D
H
/
B
M
8
S
4
U
1
l
m
r
N
l
m
r
N
z
H
M
6
6
N
I
z
H
M
6
6
N
I
z
H
M
6
6
N
I
z
H
M
6
6
z
H
M
8
4
0
t
M
*
f
t
o
w
o
L
w
o
L
w
o
L
w
o
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w
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