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參數(shù)資料
| 型號： | ICS9248YF-169-T |
| 廠商： | INTEGRATED DEVICE TECHNOLOGY INC |
| 元件分類： | 時鐘產(chǎn)生/分配 |
| 英文描述： | 150 MHz, PROC SPECIFIC CLOCK GENERATOR, PDSO48 |
| 封裝： | 0.300 INCH, SSOP-48 |
| 文件頁數(shù)： | 1/14頁 |
| 文件大?。?/td> | 198K |
| 代理商： | ICS9248YF-169-T |
Integrated
Circuit
Systems, Inc.
ICS9248-169
Third party brands and names are the property of their respective owners.
Block Diagram
9248-169 Rev A- 6/05/01
Functionality
Pin Configuration
48-Pin 300mil SSOP
Recommended Application:
440BX/VIA Apollo 133/694X style chipset.
Output Features:
2 - CPUs @2.5V, up to 166MHz.
1 - IOAPIC @ 2.5V
13 - SDRAM @ 3.3V
6 - PCI @3.3V,
1 - 48MHz, @3.3V fixed.
1 - 24MHz @ 3.3V
2 - REF @3.3V, 14.318MHz.
Features:
Up to 166MHz frequency support
Support power management: PCI, CPU stop and Mode
Spread spectrum for EMI control (± 0.50%).
Uses external 14.318MHz crystal
Skew Specifications:
CPU – CPU: <175ps
SDRAM - SDRAM: <500ps
PCI – PCI: <500ps
CPU(early)-PCI: Typ=1.0ns
Frequency Generator & Integrated Buffers for Celeron & PII/III
CLK_STOP#
PCI_STOP#
PLL2
PLL1
Spread
Spectrum
48MHz
24MHz
IOAPIC
CPUCLK_F
CPUCLK 1
SDRAM (11:0)
PCICLK (4:0)
PCICLKF
SDRAM_F
X1
X2
BUFFER IN
XTAL
OSC
PCI
CLOCK
DIVDER
STOP
SDATA
SCLK
FS(3:0)
MODE
Control
Logic
Config.
Reg.
/2
REF(1:0)
LATCH
POR
2
12
5
4
VDDREF
*PCI_STOP/REF0
GND
X1
X2
VDDPCI
*MODE/PCICLK_F
**FS3/PCICLK0
GND
PCICLK1
PCICLK2
PCICLK3
PCICLK4
VDDA
BUFFER IN
GND
SDRAM11
SDRAM10
VDDSDR
SDRAM9
SDRAM8
GND
SDATA
SCLK
VDDL
IOAPIC
REF1/FS2*
GND
CPUCLK_F
CPUCLK1
VDDL
CLK_STOP#*
SDRAM_F
GND
SDRAM0
SDRAM1
VDDSDR
SDRAM2
SDRAM3
GND
SDRAM4
SDRAM5
VDDSDR
SDRAM6
SDRAM7
VDD48
48MHz/FS0*
24MHz/FS1*
ICS9248-169
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
48
47
46
45
44
43
42
41
40
39
38
37
36
35
34
33
32
31
30
29
28
27
26
25
* Internal Pull-up Resistor of 120K to VDD
** Internal Pull-down resistor of 120K to GND
3
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F2
S
F1
S
F0
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3
ICS reserves the right to make changes in the device data identified in
this publication without further notice. ICS advises its customers to
obtain the latest version of all device data to verify that any
information being relied upon by the customer is current and accurate.
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