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參數(shù)資料
| 型號： | ICS8431AMI-21LF |
| 廠商： | INTEGRATED DEVICE TECHNOLOGY INC |
| 元件分類： | 時鐘產(chǎn)生/分配 |
| 英文描述： | 350 MHz, OTHER CLOCK GENERATOR, PDSO28 |
| 封裝： | 7.50 X 18.05 MM, 2.25 MM HEIGHT, ROHS COMPLIANT, MS-013, MO-119, SOIC-28 |
| 文件頁數(shù)： | 15/16頁 |
| 文件大小： | 256K |
| 代理商： | ICS8431AMI-21LF |
8431AMI-21
www.icst.com/products/hiperclocks.html
REV. A AUGUST 2, 2005
8
Integrated
Circuit
Systems, Inc.
ICS8431I-21
350MHZ, LOW JITTER, CRYSTAL OSCILLATOR-
TO
-3.3V LVPECL FREQUENCY SYNTHESIZER
As in any high speed analog circuitry, the power supply pins
are vulnerable to random noise. The ICS8431I-21 provides
separate power supplies to isolate any high switching noise
from the outputs to the internal PLL. V
CC, VCCA, and VCCO should
be individually connected to the power supply plane through
vias, and bypass capacitors should be used for each pin. To
achieve optimum jitter performance, better power supply iso-
lation is required.
Figure 3 illustrates how a 10
Ω along with a
10
μF and a .01μF bypass capacitor should be connected to
each V
CCA pin.
FIGURE 3. POWER SUPPLY FILTERING
10
Ω
V
CCA
10
μF
.01
μF
3.3V
.01
μF
V
CC
POWER SUPPLY FILTERING TECHNIQUES
APPLICATION INFORMATION
The clock layout topology shown below is typical for
IA64/32 platforms. The two different layouts mentioned are
recommended only as guidelines.
FOUT and nFOUT are low impedance follower outputs that
generate ECL/LVPECL compatible outputs.Therefore, terminat-
ing resistors (DC current path to ground) or current sources
must be used for functionality. These outputs are designed to
FIGURE 2B. LVPECL OUTPUT TERMINATION
FIGURE 2A. LVPECL OUTPUT TERMINATION
V
CC - 2V
50
Ω
50
Ω
RTT
Z
o = 50Ω
Z
o = 50Ω
FOUT
FIN
RTT =
Z
o
1
((V
OH + VOL) / (VCC – 2)) – 2
drive 50
Ω transmission lines. Matched impedance techniques
should be used to maximize operating frequency and minimize
signal distortion.
Figures 2A and 2B show two different layouts
which are recommended only as guidelines. Other suitable clock
layouts may exist and it would be recommended that the board
designers simulate to guarantee compatibility across all printed
circuit and clock component process variations.
TERMINATION FOR LVPECL OUTPUTS
3.3V
125
Ω
125
Ω
84
Ω
84
Ω
Z
o = 50Ω
Z
o = 50Ω
FOUT
FIN
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| ICS8431CM-01LF | 200 MHz, OTHER CLOCK GENERATOR, PDSO28 |
| ICS8431CM-11T | 255 MHz, OTHER CLOCK GENERATOR, PDSO28 |
| ICS8431CM-11LFT | 255 MHz, OTHER CLOCK GENERATOR, PDSO28 |
| ICS8431DMI-01 | 200 MHz, OTHER CLOCK GENERATOR, PDSO28 |
| ICS8431DMI-01LFT | 200 MHz, OTHER CLOCK GENERATOR, PDSO28 |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| ICS8431AMI-21LFT | 功能描述:IC SYNTHESIZER 350MHZ 28-SOIC RoHS:是 類別:集成電路 (IC) >> 時鐘/計時 - 時鐘發(fā)生器，PLL，頻率合成器 系列:HiPerClockS™ 標(biāo)準(zhǔn)包裝:1,000 系列:- 類型:時鐘/頻率合成器，扇出分配 PLL:- 輸入:- 輸出:- 電路數(shù):- 比率 - 輸入:輸出:- 差分 - 輸入:輸出:- 頻率 - 最大:- 除法器/乘法器:- 電源電壓:- 工作溫度:- 安裝類型:表面貼裝 封裝/外殼:56-VFQFN 裸露焊盤 供應(yīng)商設(shè)備封裝:56-VFQFP-EP（8x8） 包裝:帶卷 (TR) 其它名稱:844S012AKI-01LFT |
| ICS8431AMI-21T | 制造商:ICS 制造商全稱:ICS 功能描述:350MHZ, LOW JITTER, CRYSTAL OSCILLATOR-TO-3.3V LVPECL FREQUENCY SYNTHESIZER |
| ICS8431CM-01 | 制造商:ICS 制造商全稱:ICS 功能描述:200MHZ, LOW JITTER, LVPECL FREQUENCY SYNTHESIZER |
| ICS8431CM-01T | 制造商:ICS 制造商全稱:ICS 功能描述:200MHZ, LOW JITTER, LVPECL FREQUENCY SYNTHESIZER |
| ICS8431CM-11 | 制造商:ICS 制造商全稱:ICS 功能描述:255MHZ, LOW JITTER, LVPECL FREQUENCY SYNTHESIZER |
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