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參數資料
| 型號： | ICS8431CM-11T |
| 廠商： | INTEGRATED DEVICE TECHNOLOGY INC |
| 元件分類： | 時鐘產生/分配 |
| 英文描述： | 255 MHz, OTHER CLOCK GENERATOR, PDSO28 |
| 封裝： | 7.50 X 18.05, 2.25 MM HEIGHT, SOIC-28 |
| 文件頁數： | 1/18頁 |
| 文件大?。?/td> | 2136K |
| 代理商： | ICS8431CM-11T |
8431CM-11
www.icst.com/products/hiperclocks.html
REV. B AUGUST 7, 2002
1
Integrated
Circuit
Systems, Inc.
ICS8431-11
255MHZ, LOW JITTER, CRYSTAL OSCILLATOR-
TO
-3.3V LVPECL FREQUENCY SYNTHESIZER
GENERAL DESCRIPTION
The ICS8431-11 is a general purpose clock
frequency synthesizer for IA64/32 application and
a member of the HiPerClockS family of High
Performance Clock Solutions from ICS. The VCO
operates at a frequency range of 190MHz to
510MHz providing an output frequency range of 95MHz to
255MHz. The output frequency can be programmed using the
parallel interface, M0 thru M8, to the configuration logic.
Spread spectrum clocking is programmed via the control
inputs SSC_CTL0 and SSC_CTL1.
Programmable features of the ICS8431-11 support four
operational modes. The four modes are spread spectrum
clocking (SSC), non-spread spectrum clock and two test
modes which are controlled by the SSC_CTL[1:0] pins. Un-
like other synthesizers, the ICS8431-11 can immediately
change spread-spectrum operation without having to reset
the device.
In SSC mode, the output clock is modulated in order to
achieve a reduction in EMI. In one of the PLL bypass test
modes, the PLL is disconnected as the source to the
differential output allowing an external source to be
connnected to the TEST_I/O pin. This is useful for in-
circuit testing and allows the differential output to be driven
at a lower frequency throughout the system clock tree. In the
other PLL bypass mode, the oscillator divider is used as the
source to both the M and the Fout divide by 2. This is useful
for characterizing the oscillator and internal dividers.
XTAL1
XTAL2
M0:M8
PLL
FOUT
nFOUT
÷ 16
TEST_I/O
OSC
VCO
÷ 2
PHASE
DETECTOR
÷ M
SSC
Control
Logic
Configuration
Logic
nP_LOAD
SSC_CTL0
FEATURES
Fully integrated PLL
Differential 3.3V LVPECL output
Crystal oscillator interface
Output frequency range: 95MHz to 255MHz
Crystal input frequency range: 14MHz to 20MHz
VCO range: 190MHz to 510MHz
Programmable PLL loop divider for generating a variety
of output frequencies
Spread Spectrum Clocking (SSC) fixed at 1/2% modulation
for environments requiring ultra low EMI
PLL bypass modes supporting in-circuit testing and on-chip
functional block characterization
Cycle-to-cycle jitter: 30ps (maximum)
3.3V supply voltage
0°C to 85°C ambient operating temperature
BLOCK DIAGRAM
PIN ASSIGNMENT
SSC_CTL1
M0
M1
M2
M3
M4
M5
M6
M7
M8
SSC_CTL0
SSC_CTL1
VEE
TEST_I/O
VCC
1
2
3
4
5
6
7
8
9
10
11
12
13
14
28
27
26
25
24
23
22
21
20
19
18
17
16
15
nP_LOAD
VCC
XTAL2
XTAL1
nc
VCCA
VEE
MR
nc
VCCO
FOUT
nFOUT
VEE
ICS8431-11
28-Lead SOIC
7.5mm x 18.05mm x 2.25mm package body
M Package
Top View
HiPerClockS
,&6
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相關代理商/技術參數 |
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| ICS8431I-21 | 制造商:ICS 制造商全稱:ICS 功能描述:350MHZ, LOW JITTER, CRYSTAL OSCILLATOR-TO-3.3V LVPECL FREQUENCY SYNTHESIZER |
| ICS84320-01 | 制造商:IDT 制造商全稱:Integrated Device Technology 功能描述:780MHZ, CRYSTAL-TO-3.3V DIFFERENTIAL LVPECL FREQUENCY SYNTHESIZER |
| ICS84320-01K | 制造商:ICS 制造商全稱:ICS 功能描述:780MHZ, CRYSTAL-TO-3.3V DIFFERENTIAL LVPECL FREQUENCY SYNTHESIZER |
| ICS843201AG-375LF | 功能描述:IC SYNTHESIZER 375MHZ 16-TSSOP RoHS:是 類別:集成電路 (IC) >> 時鐘/計時 - 時鐘發(fā)生器，PLL，頻率合成器 系列:HiPerClockS™, FemtoClock™ 標準包裝:27 系列:Precision Edge® 類型:頻率合成器 PLL:是 輸入:PECL，晶體 輸出:PECL 電路數:1 比率 - 輸入:輸出:1:1 差分 - 輸入:輸出:無/是 頻率 - 最大:800MHz 除法器/乘法器:是/無 電源電壓:3.135 V ~ 5.25 V 工作溫度:0°C ~ 85°C 安裝類型:表面貼裝 封裝/外殼:28-SOIC（0.295"，7.50mm 寬） 供應商設備封裝:28-SOIC 包裝:管件 |
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