參數(shù)資料
型號: ICS525RI-07
元件分類: 時鐘產(chǎn)生/分配
英文描述: 250 MHz, OTHER CLOCK GENERATOR, PDSO28
封裝: 0.150 INCH, MO-153, SSOP-28
文件頁數(shù): 4/9頁
文件大?。?/td> 185K
代理商: ICS525RI-07
LVCMOS User Configurable Clock
MDS 525-07/08
B
4
Revision 031706
Integrated Circuit Systems, Inc.
525 Race Street, San Jose, CA 95126 tel (408) 297-1201 www.icst.com
ICS525-07/08
PRELIMINARY INFORMATION
Output Frequency and Output Divider Table (ICS525-07)
Output Frequency and Output Divider Table (ICS525-08)
S2
Pin 5
S1
Pin 4
S0
Pin 3
CLK Output
Divider
Output Frequency Range (MHz)
VDD = 2.5 V
VDD = 1.8 V
Min
Max
Min
Max
0
12
6
20.8
6
16
0
1
2
37
125
37
100
01
0
16
5
15.63
5
12.5
0
1
4
20
62.5
20
50
1
0
5
15
50
15
40
1
0
1
7
11
35.7
11
28
1
0
1
75
250
75
200
1
3
25
83.33
25
66
S3
Pin 2
S2
Pin 5
S1
Pin 4
S0
Pin 3
CLK Output
Divider
Output Frequency Range (MHz)
VDD = 2.5 V
VDD = 1.8 V
Min
Max
Min
Max
0
2
75
250
75
200
0
1
3
50
167
50
133
0
1
0
4
38
125
38
100
00
11
5
30
100
30
80
01
00
7
21.4
71
21.4
57
01
8
18.7
62
18.7
50
01
10
9
16.7
55
16.7
44
0
1
10
15
50
15
40
1
0
11
13.6
45
13.6
36
1
0
1
13
11.5
38
11.5
30
1
0
1
0
14
10.7
35
10.7
28.5
1
0
1
15
10
33
10
26.6
1
0
17
8.8
29.4
8.8
23.5
1
0
1
19
7.9
26.3
7.9
21
1
0
48
3.0
10.4
3.0
8.3
1
128
1.2
3.9
1.2
3.9
相關(guān)PDF資料
PDF描述
ICS525RI-07T 250 MHz, OTHER CLOCK GENERATOR, PDSO28
ICS527R-02LFT 527 SERIES, PLL BASED CLOCK DRIVER, 2 TRUE OUTPUT(S), 0 INVERTED OUTPUT(S), PDSO28
ICS527R-02LF 527 SERIES, PLL BASED CLOCK DRIVER, 2 TRUE OUTPUT(S), 0 INVERTED OUTPUT(S), PDSO28
ICS527R-02LF 527 SERIES, PLL BASED CLOCK DRIVER, 2 TRUE OUTPUT(S), 0 INVERTED OUTPUT(S), PDSO28
ICS527R-02IT 527 SERIES, PLL BASED CLOCK DRIVER, 2 TRUE OUTPUT(S), 0 INVERTED OUTPUT(S), PDSO28
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