參數(shù)資料
型號: ICS1893AFLFT
廠商: IDT, Integrated Device Technology Inc
文件頁數(shù): 124/136頁
文件大小: 0K
描述: PHYCEIVER LOW PWR 3.3V 48-SSOP
標準包裝: 1,000
系列: PHYceiver™
類型: PHY 收發(fā)器
規(guī)程: MII
電源電壓: 3.14 V ~ 3.47 V
安裝類型: 表面貼裝
封裝/外殼: 48-BSSOP(0.295",7.50mm 寬)
供應商設備封裝: 48-SSOP
包裝: 帶卷 (TR)
其它名稱: 1893AFLFT
ICS1893AF, Rev D 10/26/04
October, 2004
88
Chapter 8
Management Register Set
ICS1893AF Data Sheet - Release
Copyright 2004, Integrated Circuit Systems, Inc.
All rights reserved.
8.12.1
Data Rate (bit 17.15)
The Data Rate bit indicates the ‘selected technology’. If the ICS1893AF is in:
Hardware mode, the value of this bit is determined by the 10/100SEL input pin.
Software mode, the value of this bit is determined by the Data Rate bit 0.13.
When bit 17.15 is logic:
Zero, it indicates that 10-MHz operations are selected.
One, the ICS1893AF is indicating that 100-MHz operations are selected.
Note:
This bit does not imply any link status.
8.12.2
Duplex (bit 17.14)
The Duplex bit indicates the ‘selected technology’. If the ICS1893AF is in:
Hardware mode, the value of this bit is determined by the DPXSEL input pin.
Software mode, the value of this bit is determined by the Duplex Mode bit 0.8.
When bit 17.14 is logic:
Zero, it indicates that half-duplex operations are selected.
One, the ICS1893AF is indicating that full-duplex operations are selected.
Note:
This bit does not imply any link status.
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