參數(shù)資料
型號： ICS1893AFILFT
廠商： IDT, Integrated Device Technology Inc
文件頁數(shù)： 6/136頁
文件大小： 0K
描述： PHYCEIVER LOW PWR 3.3V 48-SSOP
標(biāo)準(zhǔn)包裝： 1,000
系列： PHYceiver™
類型： PHY 收發(fā)器
規(guī)程： MII
電源電壓： 3.14 V ~ 3.47 V
安裝類型： 表面貼裝
封裝/外殼： 48-BSSOP（0.295"，7.50mm 寬）
供應(yīng)商設(shè)備封裝： 48-SSOP
包裝： 帶卷 (TR)
其它名稱： 1893AFILFT
Chapter 9
Pin Diagram, Listings, and Descriptions
ICS1893AF, Rev. D 10/26/04
October, 2004
103
ICS1893AF Data Sheet - Release
Copyright 2004, Integrated Circuit Systems, Inc.
All rights reserved.
P3TD
6
Input or
Output
PHY (Address Bit) 3 / Transmit Data LED.
For more information on this pin, see Section 6.5, “Status Interface”.
These multi-function configuration pins are:
– Input pins during either a power-on reset or a hardware reset. In this
case, these pins configure the address of the ICS1893AF PHY
Address Bit 3.
– Output pins following reset. In this case, this pin provides indication
of Transmit activity.
As an input pin:
This pin establishes the address for the ICS1893AF. When the signal
on one of these pins is logic:
– Low, that address bit is set to logic zero.
– High, that address bit is set to logic one.
As an output pin:
When the signal on this pin is:
– De-asserted, this state indicates the ICS1893AF does not have
Transmit activity.
– Asserted, this state indicates the ICS1893AF has Transmit activity.
Caution:
This pin must not float. (See the notes at Section 9.2.2,
P4RD
8
Input or
Output
PHY (Address Bit) 4 / Receive Data LED.
For more information on this pin, see Section 6.5, “Status Interface”.
This multi-function configuration pin is:
– An input pin during either a power-on reset or a hardware reset. In
this case, this pin configures the ICS1893AF when it is in either
hardware mode or software mode.
– An output pin following reset. In this case, this pin provides activity
status of the ICS1893.
An an input pin:
This pin establishes the address for the ICS1893AF. When the signal
on this pin is logic:
– Low, that address bit is set to logic zero.
– High, that address bit is set to logic one.
As an output pin:
When the signal on this pin is:
– De-asserted, this state indicates the ICS1893AF does not have
Receive activity.
– Asserted, this state indicates the ICS1893AF has Receive activity.
Caution:
This pin must not float. (See the notes at Section 9.2.2,
Table 9-6.
PHY Address and LED Pins
Pin
Name
Pin
Number
Pin
Type
Pin Description
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ICS1893AFIT 功能描述:PHYCEIVER LOW PWR 3.3V 48-SSOP RoHS:否 類別:集成電路 (IC) >> 接口 - 驅(qū)動(dòng)器，接收器，收發(fā)器 系列:PHYceiver™ 標(biāo)準(zhǔn)包裝:1,000 系列:- 類型:收發(fā)器 驅(qū)動(dòng)器/接收器數(shù):2/2 規(guī)程:RS232 電源電壓:3 V ~ 5.5 V 安裝類型:表面貼裝 封裝/外殼:16-SOIC（0.295"，7.50mm 寬） 供應(yīng)商設(shè)備封裝:16-SOIC 包裝:帶卷 (TR)
ICS1893AFLF 功能描述:PHYCEIVER LOW PWR 3.3V 48-SSOP RoHS:是 類別:集成電路 (IC) >> 接口 - 驅(qū)動(dòng)器，接收器，收發(fā)器 系列:PHYceiver™ 標(biāo)準(zhǔn)包裝:1 系列:- 類型:收發(fā)器 驅(qū)動(dòng)器/接收器數(shù):1/1 規(guī)程:RS422，RS485 電源電壓:4.5 V ~ 5.5 V 安裝類型:表面貼裝 封裝/外殼:14-SOIC（0.154"，3.90mm 寬） 供應(yīng)商設(shè)備封裝:14-SOICN 包裝:剪切帶 (CT) 其它名稱:ISL31470EIBZ-T7ACT
ICS1893AFLFT 功能描述:PHYCEIVER LOW PWR 3.3V 48-SSOP RoHS:是 類別:集成電路 (IC) >> 接口 - 驅(qū)動(dòng)器，接收器，收發(fā)器 系列:PHYceiver™ 標(biāo)準(zhǔn)包裝:250 系列:- 類型:收發(fā)器 驅(qū)動(dòng)器/接收器數(shù):2/2 規(guī)程:RS232 電源電壓:3 V ~ 5.5 V 安裝類型:表面貼裝 封裝/外殼:16-TSSOP（0.173"，4.40mm 寬） 供應(yīng)商設(shè)備封裝:16-TSSOP 包裝:帶卷 (TR)
ICS1893AFT 功能描述:PHYCEIVER LOW PWR 3.3V 48-SSOP RoHS:否 類別:集成電路 (IC) >> 接口 - 驅(qū)動(dòng)器，接收器，收發(fā)器 系列:PHYceiver™ 標(biāo)準(zhǔn)包裝:1,000 系列:- 類型:收發(fā)器 驅(qū)動(dòng)器/接收器數(shù):2/2 規(guī)程:RS232 電源電壓:3 V ~ 5.5 V 安裝類型:表面貼裝 封裝/外殼:16-SOIC（0.295"，7.50mm 寬） 供應(yīng)商設(shè)備封裝:16-SOIC 包裝:帶卷 (TR)
ICS1893AG 制造商:ICS 制造商全稱:ICS 功能描述:3.3 V 10Base-T/100Base-TX Integrated PHYceiver-TM
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