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參數(shù)資料
| 型號(hào)： | ICE1PCS02G |
| 廠商： | INFINEON TECHNOLOGIES AG |
| 元件分類： | 基準(zhǔn)電壓源/電流源 |
| 英文描述： | Standalone Power Factor Correction (PFC) Controller in Continuous Conduction Mode (CCM) with Input Brown-Out Protection |
| 中文描述： | 單機(jī)功率因數(shù)校正在連續(xù)導(dǎo)通模式（CCM）（PFC）控制器具有輸入欠壓保護(hù) |
| 文件頁(yè)數(shù)： | 11/18頁(yè) |
| 文件大小： | 404K |
| 代理商： | ICE1PCS02G |
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CCM-PFC
ICE1PCS02/G
Functional Description
Version 1.1
11
28 Dec 2004
Figure13
Voltage Loop
3.8.2
Due to the low frequency bandwidth of the voltage loop,
the dynamic response is slow and in the range of about
several 10ms. This may cause additional stress to the
bus capacitor and the switching transistor of the PFC in
the event of heavy load changes.
The IC provides therefore a “window detector” for the
feedback voltage V
at pin 6 (VSENSE).
Whenever V
exceeds the reference value (5V)
by +5%, it will act on the nonlinear gain block which in
turn affect the gate drive duty cycle directly. This
change in duty cycle is bypassing the slow changing
VCOMP voltage, thus results in a fast dynamic
response of V
OUT
.
Enhanced Dynamic Response
3.9
Output Gate Driver
The output gate driver is a fast totem pole gate drive. It
has an in-built cross conduction currents protection and
a Zener diode Z1 (see Figure 14) to protect the external
transistor switch against undesirable over voltages.
The maximum voltage at pin 8 (GATE) is typically
clamped at 11.5V.
Figure14
Gate Driver
The output is active HIGH and at VCC voltages below
the under voltage lockout threshold V
, the gate
drive is internally pull low to maintain the off state.
VCOMP
VSENSE
C5
C4
R6
OTA1
5V
V
IN
Av(I
IN
)
Nonlinear
Gain
t
ICE1PCS02/G
Vout
L1
C2
R3
R4
Gate Driver
Current Loop
+
PWM Generation
D1
From
Full-wave
Retifier
GATE
R7
GATE
External
MOS
Z1
VCC
Gate Driver
PWM Logic
HIGH to
turn on
LV
* LV: Level Shift
ICE1PCS02/G
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