參數(shù)資料
型號(hào)： IC42S16100-7TIG
英文描述： 512K x 16 Bits x 2 Banks (16-MBIT) SYNCHRONOUS DYNAMIC RAM
中文描述： 為512k × 16位× 2組（16兆）同步動(dòng)態(tài)RAM
文件頁數(shù)： 27/78頁
文件大?。?/td> 789K
代理商： IC42S16100-7TIG
IC42S16100
Integrated Circuit Solution Inc.
DR024-0D 06/25/2004
27
Interval Between Read Command
A new command can be executed while a read cycle is in
progress, i.e., before that cycle completes. When the
second read command is executed, after the
CAS
latency
has elapsed, data corresponding to the new read command
is output in place of the data due to the previous read
command.
CAS
latency = 2, burst length = 4
READ A0
READ B0
COMMAND
I/O
CLK
D
OUT
A0
D
OUT
B0
D
OUT
B1
D
OUT
B2
READ (CA=A, BANK 0) READ (CA=B, BANK 0)
t
CCD
D
OUT
B3
Interval Between Write Command
A new command can be executed while a write cycle is in
progress, i.e., before that cycle completes. At the point the
second write command is executed, data corresponding
to the new write command can be input in place of the data
for the previous write command.
CAS
latency = 2, burst length = 4
The interval between two read command (t
CCD
) must be at
least one clock cycle.
The selected bank must be set to the active state before
executing this command.
The interval between two write commands (t
CCD
) must be
at least one clock cycle.
The selected bank must be set to the active state before
executing this command.
WRITE A0
WRITE B0
COMMAND
I/O
CLK
D
IN
A0
D
IN
B0
D
IN
B1
D
IN
B2
D
IN
B3
WRITE (CA=A, BANK 0) WRITE (CA=B, BANK 0)
t
CCD
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相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
IC42S16101 制造商:ICSI 制造商全稱:Integrated Circuit Solution Inc 功能描述:512K x 16 Bit x 2 Banks (16-MBIT) SDRAM
IC42S16101-5BG 制造商:ICSI 制造商全稱:Integrated Circuit Solution Inc 功能描述:512K x 16 Bit x 2 Banks (16-MBIT) SDRAM
IC42S16101-5BIG 制造商:ICSI 制造商全稱:Integrated Circuit Solution Inc 功能描述:512K x 16 Bit x 2 Banks (16-MBIT) SDRAM
IC42S16101-5T 制造商:ICSI 制造商全稱:Integrated Circuit Solution Inc 功能描述:512K x 16 Bit x 2 Banks (16-MBIT) SDRAM
IC42S16101-5TG 制造商:ICSI 制造商全稱:Integrated Circuit Solution Inc 功能描述:512K x 16 Bit x 2 Banks (16-MBIT) SDRAM
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