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| 型號： | IBM25PPC750CXEJQ7023T |
| 元件分類： | 微控制器/微處理器 |
| 英文描述： | 32-BIT, 600 MHz, RISC PROCESSOR, PBGA256 |
| 封裝： | 27 X 27 MM, LEAD FREE, PLASTIC, BGA-256 |
| 文件頁數(shù)： | 30/44頁 |
| 文件大?。?/td> | 416K |
| 代理商： | IBM25PPC750CXEJQ7023T |
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Data Sheet
PowerPC 750CXe RISC Microprocessor
Preliminary
System Design Information
Page 28 of 36
750cxe_DD3.1_Dev_3_gen_mkt.fm.1.5
April 8, 2004
6.4 Connection Recommendations
To ensure reliable operation, it is highly recommended to connect unused inputs to an appropriate signal
level. Unused active low inputs should be tied to OVDD. Unused active high inputs should be connected to
GND. All NC (no-connect) signals must remain unconnected.
Power and ground connections must be made to all external VDD, OVDD, and GND pins of the PowerPC
750CXe.
6.5 Output Buffer DC Impedance
The PowerPC 750CXe 60x drivers were characterized over various process, voltage, and temperature
conditions. To measure Z0, an external resistor is connected to the chip pad, either to OVDD or GND. Then
The output impedance is actually the average of two resistances: the resistance of the pull-up and the
resistance of pull-down devices. When Data is held low, SW2 is closed (SW1 is open), and RN is trimmed
until Pad = OVDD/2. RN then becomes the resistance of the pull-down devices. When Data is held high, SW1
is closed (SW2 is open), and RP is trimmed until Pad = OVDD/2. RP then becomes the resistance of the pull-
up devices. With a properly designed driver RP and RN are close to each other in value, then Z0 = (RP +
RN)/2.
Figure 6-2. Driver Impedance Measurement
Data
OV
DD
R
N
SW2
SW1
Pad
R
P
GND
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