參數(shù)資料
型號: IBM25NPE405L-3DA200CZ
元件分類: 微控制器/微處理器
英文描述: 32-BIT, 200 MHz, RISC PROCESSOR, PBGA324
封裝: 23 MM, PLASTIC, EBGA-324
文件頁數(shù): 42/48頁
文件大?。?/td> 741K
代理商: IBM25NPE405L-3DA200CZ
Advance Information
PowerNPTM NPe405L Embedded Processor Data Sheet
47
Initialization
The following describes the method by which initial chip settings are established when a system reset occurs.
Pin Strapping
While the SysReset input pin is low (system reset), the state of certain I/O pins is read to enable default initial
conditions prior to NPe405L start-up. The actual capture instant is the nearest reference clock edge before
the deassertion of reset. These pins must be strapped using external pull-up (logical 1) or pull-down
(logical 0) resistors to select the desired default conditions. These pins are use for strap functions only during
reset. They are used for other signals during normal operation. The following table lists the strapping pins
along with their functions and strapping options.
Strapping Pin Assignments
Function
Option
Ball Strapping
Width of boot device on EBC data bus
Y21
8 bits
0
16 bits
1
Ethernet ZMII mode
V21
U20
MII mode
0
SMII mode
0
1
RMII 10 Mbps mode
1
0
RMII 100 Mbps mode
1
相關PDF資料
PDF描述
IBM25NPE405L-3FA200CZ 32-BIT, 200 MHz, RISC PROCESSOR, PBGA324
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相關代理商/技術參數(shù)
參數(shù)描述
IBM25NPE405L-3FA133C 制造商:AMCC 制造商全稱:Applied Micro Circuits Corporation 功能描述:PowerNP
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