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參數(shù)資料
| 型號(hào)： | IBM13V51649AN |
| 廠商： | IBM Microeletronics |
| 英文描述： | 512K x 64 SGRAM SO DIMM（Small Outline Dual In-line Memory Modules）(512K x 64 144腳小外形雙列直插同步圖形RAM模塊) |
| 中文描述： | 為512k × 64 SGRAM蘇內(nèi)存（小外形雙列直插式內(nèi)存模塊）（為512k × 64 144腳小外形雙列直插同步圖形內(nèi)存模塊） |
| 文件頁(yè)數(shù)： | 5/14頁(yè) |
| 文件大?。?/td> | 224K |
| 代理商： | IBM13V51649AN |
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IBM13V25649AN IBM13V51649AN
256K/512K x 64 SGRAM SO DIMM
88H4121.E24358
Revised 1/98
IBM Corporation. All rights reserved.
Use is further subject to the provisions at the end of this document.
Page 5 of 14
Serial Presence Detect
Future versions of this family may include a Serial Presence Detect feature. Please contact your IBM sales
representative for assistance.
Resistor Strapping Options
Three resistor straps are used to indicate the synchronous clock frequency (period) and memory timing.
Cycle Time
15 ns
12 ns
10 ns*
7.5 ns*
reserved
reserved
reserved
reserved
DQ31
0
0
0
0
1
1
1
1
DQ30
0
0
1
1
0
0
1
1
DQ29
0
1
0
1
0
1
0
1
* Supported by IBM SGRAM SO DIMMs.
Note: A logic low (i.e. 0) indicates that the resistor strapping is tied to ground (V
SS
). A logic high (i.e. 1) indicates that the resistor strapping is tied to V
CC
.
Resistors are 4.7K on the DQ lines.
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