參數(shù)資料
型號(hào): IBM13T2649JC
廠商: IBM Microeletronics
英文描述: 2M x 64 SDRAM SO DIMM(Small Outline Dual In-Line Memory Module)(2M x 64 小外形雙列直插同步動(dòng)態(tài)RAM模塊)
中文描述: 200萬(wàn)蘇× 64 SDRAM的內(nèi)存(小外形雙列內(nèi)存模組)(2米× 64小外形雙列直插同步動(dòng)態(tài)內(nèi)存模塊)
文件頁(yè)數(shù): 5/15頁(yè)
文件大?。?/td> 299K
代理商: IBM13T2649JC
IBM13T2649JC
2M x 64 SDRAM SO DIMM
75H5376
GA14-4476-02
Rev 3/98
IBM Corporation. All rights reserved.
Use is further subject to the provisions at the end of this document.
Page 5 of 15
Serial Presence Detect (Part 1 of 2)
Byte #
Description
SPD Entry Value
Serial PD Data Entry (Hexadeci-
mal)
Notes
0
Number of Serial PD Bytes Written during
Production
128
80
1
Total Number of Bytes in Serial PD device
256
08
04
0B
09
01
4000
01
A0
80
00
80
08
00
2
Fundamental Memory Type
SDRAM
3
Number of Row Addresses on Assembly
11
4
Number of Column Addresses on Assembly
9
5
Number of DIMM Banks
1
6 - 7
Data Width of Assembly
x64
8
Voltage Interface Level of this Assembly
LVTTL
9
SDRAM Device Cycle Time
10.0ns
10
SDRAM Device Access Time from Clock
8.0ns
11
DIMM Configuration Type
Non-Parity
12
Refresh Rate/Type
SR/1X(15.625us)
13
Primary SDRAM Device Width
x8
14
Error Checking SDRAM Device Width
N/A
15
SDRAM Device Attr: Min Clk Delay, Random
Col Access
SDRAM Device Attributes: Burst Lengths
Supported
SDRAM Device Attributes: Number of
Device Banks
SDRAM Device Attributes: CAS Latencies
Supported
1 Clock
01
16
1,2,4,8, Full Page
8F
17
2
02
18
1, 2, 3
07
19
SDRAM Device Attributes: CS Latency
0
01
01
00
20
SDRAM Device Attributes: WE Latency
0
21
SDRAM Module Attributes
Unbuffered
22
SDRAM Device Attributes: General
Wr-1/Rd Burst, Precharge All,
Auto-Precharge, V
DD
0E
23
Minimum Clock Cycle at CLX-1
15.0ns
F0
24
Maximum Data Access Time (t
AC
) from
Clock at CLX-1
9.0ns
90
25
Minimum Clock Cycle Time at CLX-2
30.0ns
78
26
Maximum Data Access Time (t
AC
) from
Clock at CLX-2
Minimum Row Precharge Time (t
RP
)
Minimum Row Active to Row Active delay
(t
RRD
)
Minimum RAS to CAS delay (t
RCD
)
Minimum RAS Pulse width (t
RAS
)
27.0ns
6C
27
30ns
1E
28
20ns
14
29
30ns
1E
3C
04
00
01
cc
30
60ns
31
Module Bank Density
16MB
32 - 61
62
63
64 - 71
Reserved
SPD Revision
Checksum for bytes 0 - 62
Manufacturers’ JEDEC ID Code
Undefined
01
Checksum Data
IBM
Toronto, Canada
Vimercate, Italy
1
A400000000000000
91
53
72
Module Manufacturing Location
1. cc = Checksum Data byte, 00-FF (Hex)
2. “R” = Alphanumeric revision code, A-Z, 0-9
3. rr = ASCII coded revision code byte “R”
4. yy = Binary coded decimal year code, 00-99 (Decimal)
00-63 (Hex)
5. ww = Binary coded decimal week code, 01-52 (Decimal)
01-34 (Hex)
6. ss = Serial number data byte, 00-FF (Hex)
Discontinued (12/98 - last order; 9/99 last ship)
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