參數(shù)資料
型號: IBM11M8845HB
廠商: IBM Microeletronics
英文描述: 8M x 72 Chipkill Correct DRAM Module(8M x 72 工業(yè)標準的168腳8位動態(tài)RAM模塊(帶信號糾錯系統(tǒng)))
中文描述: 8米× 72 Chipkill正確的內(nèi)存(8米× 72工業(yè)標準的168腳8位動態(tài)內(nèi)存模塊(帶信號糾錯系統(tǒng)))
文件頁數(shù): 21/29頁
文件大?。?/td> 512K
代理商: IBM11M8845HB
IBM11M8845HB
8M x 72 Chipkill Correct DRAM Module
01L5840.00
Rev 12/97
IBM Corporation. All rights reserved.
Use is further subject to the provisions at the end of this document.
Page 21 of 29
EDO Page Mode Read Modify Write Cycle
Address
RAS
WE
OE
D
OUT
D
IN
D
IN
D
IN
t
RP
t
CP
t
CP
t
ASR
t
RAD
t
RAH
t
CAH
t
ASC
t
ASC
t
CAH
t
ASC
t
CAH
t
WP
t
CWL
t
WP
t
RCS
t
RCS
t
WP
t
CWL
t
RWL
t
CAC
t
OEH
t
OEH
t
OEH
D
OUT
D
OUT
t
CLZ
t
CLZ
t
ODD
t
ODD
t
DH
t
DH
t
CLZ
t
ODD
t
DH
D
IN
D
OUT
: “H” or “L”
Hi-Z
Hi-Z
t
RASP
t
CAS
t
HPRWC
t
CAS
t
RAL
t
AWD
t
CWD
t
AA
t
CPA
t
AA
t
AWD
t
CWD
t
RWD
t
AWD
t
CWD
t
RCS
t
RAC
t
AA
t
OEA
t
OEA
t
CAC
t
CAC
t
OEA
t
OEZ
t
OEZ
t
DS
t
DS
t
DS
Column 1
Row
Column 2
Column N
t
CSH
t
OEZ
V
IH
V
IL
V
IH
V
IL
V
IH
V
IL
V
IH
V
IL
V
IH
V
IL
V
OH
V
OL
V
IH
V
IL
t
RCD
t
CAS
t
CRP
t
CPA
CAS
t
WRP
NOTE 1
t
WRH
NOTE 1:
Implementing WE at RAS time During a Read or Write Cycle is optional.
Doing so will facilitate compatibility with future EDO DRAMs.
Discontinued (7/00 - last order; 9/00 - last ship)
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