參數(shù)資料
型號: IBM11M8735H
廠商: IBM Microeletronics
英文描述: 8M x 72 DRAM Module(8M x 72 動態(tài)RAM模塊)
中文描述: 8米× 72內存(8米× 72動態(tài)內存模塊)
文件頁數(shù): 7/29頁
文件大?。?/td> 516K
代理商: IBM11M8735H
IBM11M8735H
8M x 72 DRAM Module
50H8037.E22441D
Revised 4/98
IBM Corporation. All rights reserved.
Use is further subject to the provisions at the end of this document.
Page 7 of 29
Read, Write, Read-Modify-Write, and Refresh Cycles
(Common Parameters)
Symbol
Parameter
-50
-60
Unit
Notes
Min
Max
Min
Max
t
RC
Random Read or Write Cycle Time
89
104
ns
t
RP
RAS Precharge Time
35
40
ns
t
CP
CAS Precharge Time
8
10
ns
t
RAS
RAS Pulse Width
50
10K
60
10K
ns
t
CAS
CAS Pulse Width
8
10K
10
10K
ns
t
ASR
Row Address Setup Time
5
5
ns
t
RAH
Row Address Hold Time
8
8
ns
t
ASC
Column Address Setup Time
2
2
ns
t
CAH
Column Address Hold Time
10
10
ns
t
RCD
RAS to CAS Delay Time
12
32
12
40
ns
1
t
RAD
RAS to Column Address Delay Time
10
20
10
25
ns
2
t
RSH
RAS Hold Time
13
15
ns
t
CSH
CAS Hold Time
43
48
ns
t
CRP
CAS to RAS Precharge Time
10
10
ns
t
ODD
OE to D
IN
Delay Time
18
20
ns
3
t
DZO
OE Delay Time from D
IN
-2
-2
ns
4
t
DZC
CAS Delay Time from D
IN
-2
-2
ns
4
t
T
Transition Time (Rise and Fall)
1
30
1
30
ns
1. Operation within the t
RCD
(max) limit ensures that t
RAC
(max) can be met. The t
RCD
(max) is specified as a reference point only: If t
RCD
is greater than the specified t
RCD
(max) limit, access time is controlled by t
CAC.
2. Operation within the t
RAD
(max) limit ensures that t
RAC
(max) can be met. The t
RAD
(max) is specified as a reference point only: If t
RAD
is greater than the specified t
RAD
(max) limit, access time is controlled by t
AA.
3. Either t
CDD
or t
ODD
must be satisfied.
4. Either t
DZC
or t
DZO
must be satisfied.
Discontinued (9/98 - last order; 3/99 - last ship)
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