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參數(shù)資料
| 型號(hào)： | IBM11M8735H |
| 廠商： | IBM Microeletronics |
| 英文描述： | 8M x 72 DRAM Module(8M x 72 動(dòng)態(tài)RAM模塊) |
| 中文描述： | 8米× 72內(nèi)存（8米× 72動(dòng)態(tài)內(nèi)存模塊） |
| 文件頁數(shù)： | 1/29頁 |
| 文件大小： | 516K |
| 代理商： | IBM11M8735H |
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IBM11M8735H
8M x 72 DRAM Module
50H8037. E22441D
Revised 4/98
IBM Corporation. All rights reserved.
Use is further subject to the provisions at the end of this document.
Page 1 of 29
Features
168-Pin JEDEC-Standard 8-Byte Dual In-Line
Memory Module
8Mx72 Extended Data Out Mode DIMM
Performance:
All inputs and outputs are LVTTL compatible
Single 3.3V,
±
0.3V Power Supply
Gold contacts
Optimized for ECC applications
System Performance Benefits:
-Buffered inputs (except RAS, Data)
-Reduced noise (32 V
SS
/V
CC
pins)
-Buffered PDs
Extended Data Out (EDO) Mode, Read-Modify-
Write Cycles
Refresh Modes: RAS-Only, CBR and Hidden
Refresh
4096 refresh cycles distributed across 64ms
12/11 addressing (Row/Column)
Card size: 5.25" x 1.0" x 0.157"
DRAM
S
in TSOP Package
Description
IBM11M8735HB is an industry-standard 168-pin
8-byte Dual In-Line Memory Module (DIMM) which
is organized as an 8Mx72 high-speed memory
array, designed with EDO DRAMs for ECC applica-
tions. The DIMM uses nine 8Mx8 DRAMs in TSOP
packages. The use of EDO DRAMs allows for a
reduction in cycle time from 40ns (Fast Page) to
20ns for 50ns DRAM Modules.
Improved system performance is provided by the
on-DIMM buffering of selected input signals. The
specified timings include all buffer, net, and skew
delays, which simplifies the memory subsystem
design analysis. The data and
RAS
signals are not
buffered, which preserves the DRAM access specifi-
cation of 60ns.
Presence Detect (PD) and Identification Detect (ID)
bits provide information about the DIMM density,
addressing, performance, and features. PD bits can
be dotted at the system level and activated for each
DIMM position using the PD enable (PDE) signal. ID
bits also allow detection of card features, and may
be dot-or’d at the system level to provide information
for the entire DIMM bank. For example, the system
will determine that ECC DIMMs are installed if PD8
is low (0). ID0 need not be sensed since both x72
and x80 ECC DIMMs will function in a x72 bank.
All IBM 168-pin DIMMs provide a high-performance,
flexible 8-byte interface in a 5.25” long space-saving
footprint. Related products are the x64 non-parity
(5V and 3.3V) DIMMs and the ECC DIMMs (5V and
3.3V).
Card Outline
-50
50ns
-60
t
RAC
t
CAC
RAS Access Time
CAS Access Time
60ns
18ns
20ns
t
AA
t
RC
t
HPC
Access Time From Address
30ns
35ns
Cycle Time
EDO Mode Cycle Time
89ns
104ns
20ns
25ns
1
85
10
94
11
95
40
124
41
125
84
168
(Front)
(Back)
IBM11M8730HB8M x 72 E12/11, 3.3V, Au.
Discontinued (9/98 - last order; 3/99 - last ship)
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