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參數(shù)資料
| 型號(hào)： | IBM0418A86LQKA-6 |
| 元件分類： | SRAM |
| 英文描述： | 512K X 18 STANDARD SRAM, 3.5 ns, PQFP100 |
| 封裝： | TQFP-100 |
| 文件頁數(shù)： | 5/17頁 |
| 文件大小： | 299K |
| 代理商： | IBM0418A86LQKA-6 |
IBM0418A86LQKA
IBM0436A86LQKA
IBM0418A86SQKA
IBM0436A86SQKA
8 Mb Synchronous Communication SRAM
llwp.03
10/11/2000
IBM Corporation. All rights reserved.
Use is further subject to the provisions at the end of this document.
Page 13 of 16
Read Write Cycles
T0
T1
T2
T3
T4
T5
T6
T7
T8
T9
T10
tKHQZ
tKHQX
tKHQV
tKHDX
tKLKH
tKHAX
tAVKH
tKHCX
tCVKH
tKHEX
tEVKH
A1
A2
A4
A5
Q(A1)
A3
Q(A4)
D(A2)
D(A2)+1
A6
A7
Q(A3)
Q(A4)+1
D(A5)
Q(A6)
CLK
CKE
CE
ADV, LD
RW
BWn
ADDRESS
DQ
Command
OE
Read
Q(A1)
Write
D(A2)
Burst
Read
Q(A3)
Read
Q(A4)
Burst
Read
Write
D(A5)
Read
Q(A6)
Write
D(A7)
Deselect
D(A2+1)
Write
Q(A4+1)
tKHKL
tKHKH
tGLQV
tGHQZ
tKHQX
tGLQX
tDVKH
D(A7)
tKHQZ
A0
Read
Q(A0)
Q(A1) data is gated by asynchronous OE. Read data can always be gated by OE; even burst generated addresses data.
tKHQX1
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