參數資料
型號: HYS72D16500GR
廠商: INFINEON TECHNOLOGIES AG
英文描述: Low Profile DDR SDRAM-Modules
中文描述: 超薄DDR內存模塊
文件頁數: 15/29頁
文件大?。?/td> 803K
代理商: HYS72D16500GR
HYS72D[16500/32501]GR-[7/8]-A
Low Profile Registered DDR SDRAM-Modules
Electrical Characteristics
Data Sheet
15
Rev. 1.2, 2004-06
10292003-DNYO-BD9L
3
Electrical Characteristics
3.1
Operating Conditions
Attention: Permanent damage to the device may occur if “Absolute Maximum Ratings” are exceeded. This
is a stress rating only, and functional operation should be restricted to recommended operation
conditions. Exposure to absolute maximum rating conditions for extended periods of time may
affect device reliability and exceeding only one of the values may cause irreversible damage to
the integrated circuit.
Table 7
Parameter
Absolute Maximum Ratings
Symbol
Values
typ.
Unit
Note/ Test
Condition
min.
–0.5
max.
V
DDQ
+
0.5
+3.6
+3.6
+3.6
+70
+150
Voltage on I/O pins relative to
V
SS
V
IN
,
V
OUT
V
Voltage on inputs relative to
V
SS
Voltage on
V
DD
supply relative to
V
SS
Voltage on
V
DDQ
supply relative to
V
SS
Operating temperature (ambient)
Storage temperature (plastic)
Power dissipation (per SDRAM component)
Short circuit output current
V
IN
V
DD
V
DDQ
T
A
T
STG
P
D
I
OUT
–0.5
–0.5
–0.5
0
-55
2.0
50
V
V
V
°
C
°
C
W
mA
Table 8
Parameter
Electrical Characteristics and DC Operating Conditions
Symbol
Min.
Device Supply Voltage
V
DD
Output Supply Voltage
V
DDQ
EEPROM supply voltage
V
DDSPD
Supply Voltage, I/O Supply
Voltage
V
SSQ
Input Reference Voltage
V
REF
I/O Termination Voltage
(System)
Input High (Logic1) Voltage
V
IH(DC)
Input Low (Logic0) Voltage
V
IL(DC)
Input Voltage Level,
CK and CK Inputs
Input Differential Voltage,
CK and CK Inputs
VI-Matching Pull-up
Current to Pull-down
Current
Input Leakage Current
I
I
Values
Typ.
2.5
2.5
2.5
Unit Note/Test Condition
1)
Max.
2.7
2.7
3.6
0
2.3
2.3
2.3
0
V
V
V
V
2)
V
SS
,
0.49
×
V
DDQ
0.5
×
V
DDQ
0.51
×
V
DDQ
V
V
REF
– 0.04
3)
V
TT
V
REF
+ 0.04 V
4)
V
REF
+ 0.15
–0.3
–0.3
V
DDQ
+ 0.3
V
REF
– 0.15 V
V
DDQ
+ 0.3
V
7)
7)
V
IN(DC)
V
7)
V
ID(DC)
0.36
V
DDQ
+ 0.6
V
7)5)
VI
Ratio
0.71
1.4
6)
–2
2
μ
A
Any input 0 V
V
IN
V
DD
;
All other pins not under test
= 0 V
7)8)
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