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參數(shù)資料
| 型號： | HYS72D128520GR-8-B |
| 廠商： | INFINEON TECHNOLOGIES AG |
| 英文描述： | Connector Wall Plate; Color:Almond; Leaded Process Compatible:Yes; No. of Ports:4 RoHS Compliant: Yes |
| 中文描述： | 超薄注冊的DDR - SDRAM的我模塊 |
| 文件頁數(shù)： | 13/22頁 |
| 文件大?。?/td> | 409K |
| 代理商： | HYS72D128520GR-8-B |
HYS 72Dxx5xxGR-7F/7/8-B
Registered DDR-I SDRAM-Modules
INFINEON Technologies
13
2002-08-16 (0.91)
t
WR
Write recovery time
15
15
15
ns
1-4
t
DAL
Auto precharge write recovery
+ precharge time
(twr/tck) + (trp/
tck)
(twr/tck) + (trp/tck)
t
CK
1-4,9
t
WTR
Internal write to read command delay
1
1
1
t
CK
1-4
t
X
SNR
Exit self-refresh to non-read command
75
75
80
ns
1-4
t
X
SRD
Exit self-refresh to read command
200
200
200
t
CK
1-4
t
REFI
Average Periodic Refresh Interval
256Mb based
7.8
7.8
7.8
1-4, 8
μ
s
1. Input slew rate >=1V/ns for DDR266 and = 1V/ns for DDR200.
2. The CK/CK input reference level (for timing reference to CK/CK) is the point at which CK and CK cross: the input reference level
for signals other than CK/CK, is V
CK/CK slew rate are >= 1.0 V/ns.
3. Inputs are not recognized as valid until V
stabilizes.
4. The Output timing reference level, as measured at the timing reference point indicated in AC Characteristics (Note 3) is V
TT
.
5. t
and t
transitions occur in the same access time windows as valid data transitions. These parameters are not referred to a
specific voltage level, but specify when the device is no longer driving (H
Z
), or begins driving (L
Z
).
6. The maximum limit for this parameter is not a device limit. The device operates with a greater value for this parameter, but system
performance (bus turnaround) degrades accordingly.
7. The specific requirement is that DQS be valid (HIGH, LOW, or some point on a valid transition) on or before this CK edge. A valid
transition is defined as monotonic and meeting the input slew rate specifications of the device. When no writes were previously in
progress on the bus, DQS will be transitioning from Hi-
Z
to logic LOW. If a previous write was in progress, DQS could be HIGH,
LOW, or transitioning from HIGH to LOW at this time, depending on t
DQSS
.
8. A maximum of eight Autorefresh commands can be posted to any given DDR SDRAM device.
9. For each of the terms, if not already an integer, round to the next highest integer. tCK is equal to the actual system clock cycle
time.
10. These parameters guarantee device timing, but they are not necessarily tested on each device
11. Fast slew rate >= 1.0 V/ns , slow slew rate >= 0.5 V/ns and
<
1V/ns for command/address and CK & CK slew rate >1.0 V/ns, mea-
sured between VOH(ac) and VOL(ac)
Electrical Characteristics & AC Timing for DDR-I components
(for reference only)
(0
°
C
≤
T
A
≤
70
°
C
;
V
DDQ
= 2.5V
±
0.2V
;
V
DD
= 2.5V
±
0.2V)
Symbol
Parameter
DDR266F
-7F
DDR266A
-7
DDR200
-8
Unit
Notes
Min
Max
Min
Max
Min
Max
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| HYS72D64000GR-7-B | 2.5 V 184-pin Registered DDR-I SDRAM Modules |
| HYS72D128020GR-7-B | Modular Connector; No. of Contacts:8; Approval Categories:Fire-Retardant UL 94V-0 Rated; Body Material:Plastic; Color:Blue; Contact Material:Phosphor Bronze; Contact Termination:Punchdown RoHS Compliant: Yes |
| HYS72D128021GR-7-B | Connector Wall Plate; Color:White; Leaded Process Compatible:Yes; No. of Ports:4 RoHS Compliant: Yes |
| HYS72D128021GR-8-B | Connector Wall Plate; Color:Almond; Leaded Process Compatible:Yes; No. of Ports:6 RoHS Compliant: Yes |
| HYS72D64020GR-7-B | 2.5 V 184-pin Registered DDR-I SDRAM Modules |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| HYS72D128521GR-7-B | 制造商:INFINEON 制造商全稱:Infineon Technologies AG 功能描述:Low Profile Registered DDR-I SDRAM-Modules |
| HYS72D128521GR-7F-B | 制造商:INFINEON 制造商全稱:Infineon Technologies AG 功能描述:Low Profile Registered DDR-I SDRAM-Modules |
| HYS72D128521GR-8-B | 制造商:INFINEON 制造商全稱:Infineon Technologies AG 功能描述:Low Profile Registered DDR-I SDRAM-Modules |
| HYS72D128900HBR-6-C | 制造商:QIMONDA 制造商全稱:QIMONDA 功能描述:184-Pin Registered Double-Data-Rate SDRAM Module |
| HYS72D16000GR | 制造商:INFINEON 制造商全稱:Infineon Technologies AG 功能描述:Registered DDR SDRAM-Modules |
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