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參數(shù)資料
| 型號： | HYS 72V64220GU |
| 廠商： | SIEMENS AG |
| 英文描述： | 3.3 V 64M 72-Bit SDRAM Modules(3.3 V 64M 64/72-Bit 2 個存儲體的 SDRAM 模塊) |
| 中文描述： | 3.3伏6400 72位SDRAM模塊（3.3伏6400 64/72-Bit 2個存儲體的內(nèi)存模塊） |
| 文件頁數(shù)： | 8/17頁 |
| 文件大?。?/td> | 131K |
| 代理商： | HYS 72V64220GU |
HYS 64/72V64220GU
SDRAM-Modules
Data Book
8
3.00
AC Characteristics
3), 4)
T
A
= 0 to 70
°
C;
V
SS
= 0 V;
V
DD
= 3.3 V
±
0.3 V,
t
T
= 1 ns
Parameter
Symbol
Limit Values
Unit
Note
-7.5
PC133-333
-8
PC100-222
min.
max.
min.
max.
Clock
Clock Cycle Time
CAS Latency = 3
CAS Latency = 2
t
CK
7.5
12
–
–
10
10
–
–
ns
ns
–
System Frequency
CAS Latency = 3
CAS Latency = 2
for HYS64/72V64220GU-7.5-A
for HYS64/72V64220GU-7.5-C
f
CK
–
–
–
133
83
100
–
–
–
100
100
100
MHz
MHz
MHz
–
*)
*)
Clock Access Time
CAS Latency = 3
CAS Latency = 2
t
AC
–
–
5.4
6
–
–
6
6
ns
ns
4), 5)
Clock High Pulse Width
t
CH
t
CL
2.5
–
3
–
ns
6)
Clock Low Pulse Width
2.5
–
3
–
ns
6)
Setup and Hold Times
Input Setup Time
t
CS
t
CH
t
SB
t
PDE
t
RSC
t
T
1.5
–
2
–
ns
7)
Input Hold Time
0.8
–
1
–
ns
7)
Power Down Mode Entry Time
–
1
–
1
CLK
8)
Power Down Mode Exit Setup Time
1
–
1
–
CLK
9)
Mode Register Setup Time
2
–
2
–
CLK
Transition Time (rise and fall)
1
–
1
–
ns
–
Common Parameters
RAS to CAS Delay
t
RCD
t
RP
t
RAS
t
RC
t
RRD
20
–
20
–
ns
–
Precharge Time
20
–
20
–
ns
–
Active Command Period
45
100k
50
100k
ns
–
Cycle Time
67.5
–
70
–
ns
–
Bank to Bank Delay Time
CAS to CAS Delay Time (same bank)
t
CCD
15
–
16
–
ns
–
1
–
1
–
CLK
–
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| HYS72V64220GU-7.5 | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:x72 SDRAM Module |
| HYS72V64220GU-7.5-C2 | 制造商:INFINEON 制造商全稱:Infineon Technologies AG 功能描述:SDRAM|64MX72|CMOS|DIMM|168PIN|PLASTIC |
| HYS72V64220GU-7.5-D | 制造商:INFINEON 制造商全稱:Infineon Technologies AG 功能描述:SDRAM|64MX72|CMOS|DIMM|168PIN|PLASTIC |
| HYS72V64220GU-75-C2 | 制造商:INFINEON 制造商全稱:Infineon Technologies AG 功能描述:3.3 V 64M x 64/72-Bit, 512MByte SDRAM Modules 168-pin Unbuffered DIMM Modules |
| HYS72V64220GU-75-D | 制造商:INFINEON 制造商全稱:Infineon Technologies AG 功能描述:3.3 V 64M x 64/72-Bit, 512MByte SDRAM Modules 168-pin Unbuffered DIMM Modules |
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