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參數(shù)資料
| 型號(hào)： | HYMR1848-745 |
| 廠商： | HYNIX SEMICONDUCTOR INC |
| 元件分類： | DRAM |
| 英文描述： | 48M X 18 RAMBUS MODULE, DMA84 |
| 封裝： | RIMM-184 |
| 文件頁(yè)數(shù)： | 8/10頁(yè) |
| 文件大?。?/td> | 112K |
| 代理商： | HYMR1848-745 |
Preliminary
Page 7
HYMR1648/1848 Series
IDD - VDD Supply Current Profile
ICMOS - VCMOS Supply Current Profile
IDD
RIMM module power test conditions
-600
Max
-711
Max
-800
Max
Unit
IDD1
All RDRAMs in powerdown, self-refresh mode
TBD/TBDa
a. For modules with a -LP designator.
mA
IDD2
All RDRAMs in NAP mode
TBD
mA
IDD3
All RDRAMs in Standby mode, no commands
TBD
mA
IDD4
All RDRAMs in Active mode, no commands
TBD
mA
IDD5
All RDRAMs running refresh cycles, with tRC = tRC,MIN
TBD
mA
IDD6
All RDRAMs running refresh cycles, with tRC = tREF/# of rows
TBD
mA
IDD7
One RDRAM cycling tRC = min, 1 bank, no COL packets, remainder of
RDRAMs in Standby
TBD
mA
IDD8
One RDRAM cycling tRC = min, 1 bank, two dualocts per activate (32-byte
transfers), remainder of RDRAMs in Standby
TBD
mA
IDD9
One RDRAM burst read/write, 1 bank open, full bandwidth, COL address
changing every dualoct, remainder of RDRAMs in Standby
TBD
mA
ICMOS
RIMM module power test conditions
Max
Unit
ICMOS1
Current when RDRAMs are in powerdown, self-refresh state
TBD
mA
ICMOS2
Current when CMOS pins are used for register read/write operations (f=1MHz)
TBD
mA
ICMOS3
Current when CMOS pins are used for power management operations (f=100MHz)
TBD
mA
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