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參數(shù)資料
| 型號： | HYM72V8025GS-50- |
| 廠商： | SIEMENS AG |
| 英文描述： | 8M x 72-Bit EDO- DRAM Module |
| 中文描述： | 8米× 72位江戶記憶體模組 |
| 文件頁數(shù)： | 1/11頁 |
| 文件大?。?/td> | 65K |
| 代理商： | HYM72V8025GS-50- |
Semiconductor Group
1
8M
×
72-Bit EDO- DRAM Module
(ECC - Module)
168 pin buffered DIMM Module
HYM 72V8025GS-50/-60
HYM 72V8035GS-50/-60
168 pin JEDEC Standard, Buffered 8 Byte Dual In-Line Memory Module
for PC main memory applications
1 bank 8 M x 72 organisation
Optimized for ECC applications
Hyper Page Mode - EDO Operation
Performance:
Single + 3.3V
±
0.3 V supply
CAS-before-RAS refresh, RAS-only refresh
Decoupling capacitors mounted on substrate
All inputs, outputs and clock fully LVTTL & LVCMOS compatible
4 Byte interleave enabled, Dual Address inputs (A0/B0)
Buffered inputs excepts RAS and DQ
Parallel Presence Detects
Utilizes nine 8M
×
8 -DRAMs and BiCMOS buffers/line drivers VT244A
Two versions: HYM 72V8035GS with SOJ-components ( 9 mm module thickness)
HYM 72V8025GS with TSOPII-components ( 4 mm module thickness)
4048 refresh cycles / 64 ms with 12 / 11 addressing
Gold contact pad
Double sided module with 25.35 mm (1000 mil) height
-50
50 ns
18 ns
30 ns
84 ns
20 ns
-60
60 ns
20 ns
35 ns
104 ns
25 ns
tRAC
tCAC
tAA
tRC
tHPC
RAS Access Time
CAS Access Time
Access Time from Address
Cycle Time
EDO Mode Cycle Time
3.97
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| HYM91000LL-60 | x(8+1) Fast Page Mode DRAM Module |
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| HYM72V8025GS-60 | 制造商:INFINEON 制造商全稱:Infineon Technologies AG 功能描述:8M x 72-Bit EDO- DRAM Module |
| HYM72V8030GS-50 | 制造商:INFINEON 制造商全稱:Infineon Technologies AG 功能描述:8M x 72-Bit Dynamic RAM Module |
| HYM72V8030GS-60 | 制造商:INFINEON 制造商全稱:Infineon Technologies AG 功能描述:8M x 72-Bit Dynamic RAM Module |
| HYM72V8035GS-50 | 制造商:INFINEON 制造商全稱:Infineon Technologies AG 功能描述:8M x 72-Bit EDO- DRAM Module |
| HYM72V8035GS-60 | 制造商:INFINEON 制造商全稱:Infineon Technologies AG 功能描述:8M x 72-Bit EDO- DRAM Module |
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