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參數(shù)資料
| 型號： | HYE18P32161ACL85 |
| 廠商： | INFINEON TECHNOLOGIES AG |
| 元件分類： | 圓形連接器 |
| 英文描述： | Circular Connector; MIL SPEC:MIL-DTL-38999 Series II; Body Material:Metal; Series:JT; No. of Contacts:11; Connector Shell Size:18; Connecting Termination:Crimp; Circular Shell Style:Straight Plug; Body Style:Straight RoHS Compliant: No |
| 中文描述： | 32M的異步/頁的CellularRAM |
| 文件頁數(shù)： | 16/33頁 |
| 文件大?。?/td> | 641K |
| 代理商： | HYE18P32161ACL85 |
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HYE18P32161AC(-/L)70/85
32M Asynch/Page CellularRAM
Functional Description
Data Sheet
16
V2.0, 2003-12-16
2.3
Refresh Control Register
The Refresh Control Register (RCR) allows to save stand-by power additionally by making use of the
Temperature-Compensated Self Refresh (TCSR), Partial-Array Self Refresh (PASR) and Deep Power Down
(DPD) features. The Refresh Control Register is programmed via the Control Register Set command and retains
the stored information until it is reprogrammed or the device loses power.
Please note that the RCR contents can only be set or changed when the CellularRAM is in idle state.
RCR
Refresh Control Register
(ZZ, A19 = 00
B
)
A20
A19
A18
A17
A16
A15
A14 A13 A12 A11 A10
A9
A8
A7
A6
A5
A4
A3
A2
A1
A0
0
RS
0
PM
TCSR
DPD
0
PASR
Field
RS
Bits
19
Type
1)
Description
w
Register Select
0
w
Page Mode Enable/Disable
In asynchronous operation mode the user has the option to toggle A0 - A3 in a random
way at higher rate (20 ns vs. 70 ns) to lower access times of subsequent reads with
16-word boundary. In synchronous mode this option has no effect. The max. page
length is 16 words.
Please note that as soon as page mode is enabled the CS1 low time restriction
applies. This means that the CS1 signal must not be kept low longer than
t
CSL
= 10
μ
s.
Please refer to
Figure 11
.
0
page mode disabled (default)
1
page mode enabled
w
Temperature Compensated Self Refresh
The 2-bit wide TCSR field features four different temperature ranges to adjust the
refresh period to the actual case temperature. Since DRAM technology requires higher
refresh rates at higher temperature this is a second method to lower power
consumption in case of low or medium temperatures.
11
+85 °C (default)
00
+70 °C
01
+45 °C
10
+15 °C
w
Deep Power Down Enable/Disable
The DPD control bit puts the CellularRAM device in an extreme low power mode
cutting current consumption to less than 25
μ
A. Stored memory data is not retained in
this mode, while the settings of control register, RCR is stored during DPD.
0
DPD enabled
1
DPD disabled (default)
set to 0 to select this RCR.
PM
7
TCSR
[6:5]
DPD
4
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| HYE18P32161AC-70 | 32M Asynchronous/Page CellularRAM |
| HYE25L256160AC-75 | SMP(M)PIN CONT,PCB REAR MNT |
| HYE25L256160AF-7.5 | BJAWBMSpecialty DRAMs Mobile-RAM |
| HYE25L256160AC | 256-Mbit Mobile-RAM |
| HYE25L256160AC-8 | 256-Mbit Mobile-RAM |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| HYE25L128160AC-7.5 | 制造商:INFINEON 制造商全稱:Infineon Technologies AG 功能描述:BJAWBMSpecialty DRAMs Mobile-RAM |
| HYE25L128160AC-75 | 制造商:INFINEON 制造商全稱:Infineon Technologies AG 功能描述:128-MBIT SYNCHRONOUS LOW-POWER DRAM IN CHIPSIZE PACKAGES |
| HYE25L128160AC-8 | 制造商:INFINEON 制造商全稱:Infineon Technologies AG 功能描述:128-MBIT SYNCHRONOUS LOW-POWER DRAM IN CHIPSIZE PACKAGES |
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