參數(shù)資料
型號： HYE18P32161ACL85
廠商： INFINEON TECHNOLOGIES AG
元件分類： 圓形連接器
英文描述： Circular Connector; MIL SPEC:MIL-DTL-38999 Series II; Body Material:Metal; Series:JT; No. of Contacts:11; Connector Shell Size:18; Connecting Termination:Crimp; Circular Shell Style:Straight Plug; Body Style:Straight RoHS Compliant: No
中文描述： 32M的異步/頁的CellularRAM
文件頁數(shù)： 13/33頁
文件大?。?/td> 641K
代理商： HYE18P32161ACL85
Data Sheet
13
V2.0, 2003-12-16
HYE18P32161AC(-/L)70/85
32M Asynch/Page CellularRAM
Overview
1.6
Commands
All commands are of asynchronous nature. The supported control signal combinations are listed in the table below.
C
Table 3
Note:‘L’ represents a low voltage level, ‘H’ a high voltage level, ‘X’ represents “Don’t Care”, ‘V’ represents “Valid”.
Note:‘L’ represents a low voltage level, ‘H’ a high voltage level, ‘X’ represents “Don’t Care”, ‘V’ represents “Valid”.
Asynchronous Command Table
Operation Mode
READ
WRITE
SET CONTROL
REGISTER
NO OPERATION
DESELECT
DPD
Power Mode
Active
Active
Active
CS1
L
L
L
WE
H
L
L
OE
L
X
2)
X
2)
UB/LB
L
1)
L
1)
X
ZZ
H
H
L
A19
V
V
L
A20 - A0
ADR
ADR
RCR DIN
DQ15:0
DOUT
DIN
X
1)
Table 3
reflects the behaviour if UB and LB are asserted to low. If only either of the signals, UB or LB, is asserted to low
only the corresponding data byte will be output or written (UB enables DQ15 - DQ8, LB enables DQ7 - DQ0).
2) During a write access invoked by WE set to low the OE signal is ignored.
3) Stand-by power mode applies only to the case when CS goes low from DESELECT while no address change occurs.
Toggling address results in active power mode. Also, NO OPERATION from any active power mode by keeping CS low
consumes the power higher than stand-by mode.
Standby~Active
3)
Standby
Deep Power Down
L
H
H
H
X
X
H
X
X
X
X
X
H
X
L
X
X
X
X
X
X
High-Z
High-Z
High-Z
Table 4
Mode
READ
Description of Commands
Description
The READ command is used to perform an asynchronous read cycle. The
signals, UB and LB, define whether only the lower, the upper or the whole 16-bit
word is output.
The WRITE command is used to perform an asynchronous write cycle. The data
is latched on the rising edge of either CS, WE, UB, LB, whichever comes first.
The signals, UB and LB, define whether only the lower, the upper or the whole
16-bit word is latched into the CellularRAM.
The control registers are loaded via the address inputs A15 - A0 performing an
asynchronous write access. Please refer to the control register description for
details. The SCR command can only be issued when the CellularRAM is in idle
state.
The NOP command is used to perform a no operation to the CellularRAM, which
is selected (CS1 = 0). Operations already in progress are not affected. Power
consumption of this command mode varies by address change and initiating
condition.
The DESELECT function prevents new commands from being executed by the
CellularRAM. The CellularRAM is effectively deselected. I/O signals are put to
high impedance state.
DPD stops all refresh-related activities and entire on-chip circuit operation.
Current consumption drops below 25
μ
A. Wake-up from DPD also requires
150
μ
s to get ready for normal operation.
WRITE
SET CONTROL REGISTER
NO OPERATION
DESELECT
DPD
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