參數(shù)資料
型號(hào): HYB25S256160AC-7.5
廠商: INFINEON TECHNOLOGIES AG
元件分類: DRAM
英文描述: 16M X 16 SYNCHRONOUS DRAM, 7.5 ns, PBGA54
封裝: 12 X 8 MM, PLASTIC, TFBGA-54
文件頁數(shù): 5/16頁
文件大?。?/td> 490K
代理商: HYB25S256160AC-7.5
Internet Data Sheet
13
Rev. 1.40, 2005-05
03292006-M7EN-VIAQ
HYS25[L/S]256160A[F/C]–7.5
256MBit Mobile-RAM
Electrical Characteristics
4
Electrical Characteristics
4.1
Operating Conditions
Attention: Stresses above those listed here may cause permanent damage to the device. Exposure to
absolute maximum rating conditions for extended periods may affect device reliability.
Maximum ratings are absolute ratings; exceeding only one of these values may cause
irreversible damage to the integrated circuit.
Table 5
Absolute Maximum Ratings
Parameter
Symbol
Values
Unit
Note/
Test Condition
min.
typ.
max.
Voltage on I/O pins relative to
V
SS
V
IN, VOUT
–1.0
V
DD +0.5 V
Voltage on I/O pins relative to
V
SS
V
IN, VOUT
–1.0
+4.6
V
Voltage on
V
DD supply relative to VSS
V
DD
–1.0
+4.6
V
Voltage on
V
DDQ supply relative to VSS
V
DDQ
–1.0
+4.6
V
Operating Case Temperature (extended)
T
CASE
–25
+85
°C—
Storage Temperature (Plastic)
T
STG
–55
+150
°C—
Power Dissipation
P
D
——
0.7
W
Short Circuit Output Current
I
OUT
—50
mA
Table 6
Recommended Operating Conditions and DC Characteristics1)
1) 0
°C ≤ T
C ≤ 70 °C (comm.) and –25 °C ≤ TCASE +85 °C
Parameter
Symbol
Values
Unit Note/ Test Condition
min.
max.
Supply Voltage
V
DD
+2.3
+3.6
V
I/O Supply Voltage
V
DDQ
+1.65
+3.6
V
2)
V
DDQ < VDD + 0.3 V
Supply Voltage
V
SS
00
V
I/O Supply Voltage
V
SSQ
00
V
Input High (Logic 1) Voltage
V
IH
0.8 x
V
DDQ
V
DDQ + 0.3
V
3)4)
3) All voltages referenced to
V
SS
4)
V
IH may overshoot to VDDQ + 2.0 V for pulse width of < 4 ns.
V
IL may undershoot to – 2.0 V for pulse width < 4 ns.
Pulse width measured at 50% points with amplitude measured peak to DC reference
Input Low (Logic 0) Voltage
V
IL
–0.3
+0.3
V
Output High (Logic 1) Voltage
V
OH
V
DDQ – 0.2
V
IOH = –0.1 mA
Output Low (Logic 0) Voltage
V
OL
—+0.2
V
IOH = +0.1 mA
Input Leakage Current
I
IL
–5
+5
A
Any input 0 V
V
IN VDD;
all other pins not under test
V
IN =0V
Output Leakage Current
I
OZ
–5
+5
A
DQ is disabled; 0 V
V
OUT VDDQ
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