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參數(shù)資料
| 型號(hào)： | HYB25S256160AC-7.5 |
| 廠商： | INFINEON TECHNOLOGIES AG |
| 元件分類(lèi)： | DRAM |
| 英文描述： | 16M X 16 SYNCHRONOUS DRAM, 7.5 ns, PBGA54 |
| 封裝： | 12 X 8 MM, PLASTIC, TFBGA-54 |
| 文件頁(yè)數(shù)： | 13/16頁(yè) |
| 文件大小： | 490K |
| 代理商： | HYB25S256160AC-7.5 |
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Internet Data Sheet
6
Rev. 1.40, 2005-05
03292006-M7EN-VIAQ
256MBit Mobile-RAM
Mobile-RAM
HYS25[L/S]256160A[F/C]–7.5
HYB25S256160AC
HYE25L256160AF
1Overview
1.1
Features
16 Mbits
× 16 organisation
Fully synchronous to positive clock edge
Four internal banks for concurrent operation
Data mask (DM) for byte control with write and read data
Programmable CAS latency: 2 or 3
Programmable burst length: 1, 2, 4, 8, or full page
Programmable wrap sequence: sequential or interleaved
Random column address every clock cycle (1-N rule)
Deep power down mode
Extended mode register for Mobile-RAM features
Temperature compensated self refresh with on-die temperature sensor
Partial array self refresh
Power down and clock suspend mode
Automatic and controlled precharge command
Auto refresh mode (CBR)
8192 refresh cycles / 64 ms
Self-refresh with programmble refresh period
Programmable power reduction feature by partial array activation during self-refresh
V
DDQ = 1.8V or 2.5 V or 3.3 V
V
DD = 2.5 V or 3.3 V
P-TFBGA-54 package 9-by-6-ball array with 3 depopulated rows (12 x 8 mm2)
Operating temperature range:
commercial (0 °C to +70 °C)
extended (–25 °C to +85 °C)
1.2
Description
The 256MBit Mobile-RAM is a new generation of low power, four bank synchronous DRAM organized as
4 banks x 4 Mbit x 16 with additional features for mobile applications. The synchronous Mobile-RAM achieves
high speed data transfer rates by employing a chip architecture that prefetches multiple bits and then synchronizes
the output data to a system clock.
The device adds new features to the industry standards set for synchronous DRAM products. Parts of the memory
array can be selected for Self-Refresh and the refresh period during Self-Refresh is programmable in 4 steps
Table 1
Performance 1)
1) for VDDQ = 2.5 V or 3.3 V;
Part Number Speed Code
–7.5
Unit
max. Clock Frequency
@CL3
f
CK3
133
MHz
min. Clock Period
@CL3
t
CK3
7.5
ns
min. Access Time from Clock
@CL3
t
AC3
6.0
ns
min. Clock Period
@CL2
t
CK2
9.5
ns
min. Access Time from Clock
@CL2
t
AC2
6.0
ns
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| HYB3116160BSJ | 制造商:INFINEON 制造商全稱(chēng):Infineon Technologies AG 功能描述:1M x 16-Bit Dynamic RAM 1k & 4k -Refresh |
| HYB3116160BSJ-50 | 制造商:INFINEON 制造商全稱(chēng):Infineon Technologies AG 功能描述:1M x 16-Bit Dynamic RAM 1k & 4k -Refresh |
| HYB3116160BSJ-60 | 制造商:INFINEON 制造商全稱(chēng):Infineon Technologies AG 功能描述:1M x 16-Bit Dynamic RAM 1k & 4k -Refresh |
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