- 您現(xiàn)在的位置：買賣IC網(wǎng) > PDF目錄385400 > HT49R50A (Holtek Semiconductor Inc.) 8-Bit High Performance High speed Microcontroller(8位、高性能、高速微控制器) PDF資料下載
參數(shù)資料
| 型號： | HT49R50A |
| 廠商： | Holtek Semiconductor Inc. |
| 英文描述： | 8-Bit High Performance High speed Microcontroller(8位、高性能、高速微控制器) |
| 中文描述： | 8位高性能高速微控制器（8位，高性能，高速微控制器） |
| 文件頁數(shù)： | 17/51頁 |
| 文件大?。?/td> | 320K |
| 代理商： | HT49R50A |
第1頁第2頁第3頁第4頁第5頁第6頁第7頁第8頁第9頁第10頁第11頁第12頁第13頁第14頁第15頁第16頁當(dāng)前第17頁第18頁第19頁第20頁第21頁第22頁第23頁第24頁第25頁第26頁第27頁第28頁第29頁第30頁第31頁第32頁第33頁第34頁第35頁第36頁第37頁第38頁第39頁第40頁第41頁第42頁第43頁第44頁第45頁第46頁第47頁第48頁第49頁第50頁第51頁
HT49R50A
17
November 29, 2000
Watchdog Timer
WDT
The WDT clock source is implemented by a ded-
icated RC oscillator (WDT oscillator) or an in-
struction clock (system clock/4) or a real time
clock oscillator (RTC oscillator). The timer is
designed to prevent a software malfunction or
sequence from jumping to an unknown location
with unpredictable results. The WDT can be
disabled by options. But if the WDT is disabled,
all executions related to the WDT lead to no op-
eration.
The WDT time-out period is fixed as f
S
/2
16
.
If the WDT clock source chooses the internal
WDT oscillator, the time-out period may vary
with temperature, VDD, and process variations.
On the other hand, if the clock source selects the
instruction clock and the halt instruction is ex-
ecuted, WDT may stop counting and lose its pro-
tecting purpose, and the logic can only be
restarted by an external logic.
When the device operates in a noisy environ-
ment, using the on-chip RC oscillator (WDT
OSC)isstronglyrecommended,sincetheHALT
can stop the system clock.
The WDT overflow under normal operation
initializes a "chip reset" and sets the status bit
"TO". In the HALT mode, the overflow
initializes a "warm reset", and only the PC and
SP are reset to zero. To clear the contents of the
WDT, there are three methods to be adopted,
i.e., external reset (a low level to RES), software
instruction, and a HALT
are two types of software instructions; "CLR
WDT" and the other set
"CLR WDT2". Of these two types of instruction,
only one type of instruction can be active at a
time depending on the options
times selection option . If the "CLR WDT" is se-
lected (i.e., CLR WDT times equal one), any ex-
ecution of the "CLR WDT" instruction clears
the WDT. In the case that "CLR WDT1" and
"CLR WDT2" are chosen (i.e., CLR WDT times
equaltwo),thesetwoinstructionshavetobeex-
ecuted to clear the WDT; otherwise, the WDT
may reset the chip due to time-out.
instruction. There
"CLR WDT1" and
"CLR WDT"
Multi-function timer
The HT49R50A provides a multi-function timer
for the WDT, time base and RTC but with differ-
ent time-out periods. The multi-function timer
consists of a 8-stage divider and an 7-bit
prescaler, with the clock source coming from the
WDT OSC or RTC OSC or the instruction clock
(i.e.., system clock divided by 4). The
multi-function timer also provides a selectable
frequency signal (ranges from f
S
/2
2
to f
S
/2
8
) for
LCD driver circuits, and a selectable frequency
signal (ranges from f
S
/2
2
to f
S
/2
9
) for the buzzer
output by options. It is recommended to select a
near 4kHz signal to LCD driver circuits for
proper display.
# ' < = )
>
.
' <
.
= 2
1 4 3 2
-
-
&
:'' &
)
4
>
Watchdog Timer
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| HT49R50 | 8-BIT MICROCONTROLLER |
| HT5D048 | 0.8m CMOS High Speed Gate Array(0.8m CMOS高速門陣列) |
| HT5D028 | 0.8m CMOS High Speed Gate Array(0.8m CMOS高速門陣列) |
| HT5D064 | 0.8m CMOS High Speed Gate Array(0.8m CMOS高速門陣列) |
| HT5F240 | 0.8m CMOS High Speed Gate Array(0.8m CMOS高速門陣列) |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| HT49R50A-1 | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:8-Bit LCD Type OTP MCU |
| HT49R50A-1(LQFP100) | 制造商:Holtek Semiconductor Inc 功能描述:IC, LCD TYPE 8-BIT MCU, QFP100 |
| HT49R50A-1_09 | 制造商:HOLTEK 制造商全稱:Holtek Semiconductor Inc 功能描述:LCD Type 8-Bit MCU |
| HT49R50A-1_12 | 制造商:HOLTEK 制造商全稱:Holtek Semiconductor Inc 功能描述:LCD Type 8-Bit MCU |
| HT49R70A-1 | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:8-Bit LCD Type OTP MCU |
發(fā)布緊急采購，3分鐘左右您將得到回復(fù)。