
HT49C50
17
August 18, 1999
Watchdog timer
WDT
The WDT clock source is implemented by a ded-
icated RC oscillator (WDT oscillator) or an in-
struction clock (system clock/4) or a real time
clock oscillator (RTC oscillator). The timer is
designed to prevent a software malfunction or
sequence from jumping to an unknown location
with unpredictable results. The WDT can be
disabled by mask option. But if the WDT is dis-
abled, all executions related to the WDT lead to
no operation.
After the WDT clock source is selected, the
time-out period is f
S
/2
~ f
S
/2
.
If the WDT clock source chooses the internal
WDT oscillator, the time-out period may vary
with temperature, VDD, and process variations.
On the other hand, if the clock source selects the
instructionclockandthe halt instructionisexe-
cuted, WDT may stop counting and lose its pro-
tecting purpose, and the logic can only be
restarted by an external logic.
When the device operates in a noisy environ-
ment, using the on-chip RC oscillator (WDT
OSC)isstronglyrecommended,sincetheHALT
can stop the system clock.
The WDT overflow under normal operation
initializes a chip reset and sets the status bit
TO . In the HALT mode, the overflow
initializes a warm reset , and only the PC and
SP are reset to zero. To clear the contents of the
WDT, there are three methods to be adopted,
i.e., external reset (a low level to RES), software
instruction, and a HALT instruction. There
are two types of software instructions; CLR
WDT and the other set
CLR WDT2 . Of these two types of instruction,
only one type of instruction can be active at a
time depending on the mask option
WDT times selection option . If the CLR WDT
isselected(i.e.,CLRWDTtimesequalone),any
execution of the CLR WDT instruction clears
the WDT. In the case that CLR WDT1 and
CLR WDT2 are chosen (i.e., CLR WDT times
equaltwo),thesetwoinstructionshavetobeex-
ecuted to clear the WDT; otherwise, the WDT
may reset the chip due to time-out.
CLR WDT1 and
CLR
Multi-function timer
TheHT49C50providesamulti-functiontimerfor
the WDT, time base and RTC but with different
time-out periods. The multi-function timer con-
sists of a 7-stage divider and an 8-bit prescaler,
with the clock source coming from the WDT OSC
or RTC OSC or the instruction clock (i.e.., system
clock divided by 4). The multi-function timer also
provides a selectable frequency signal (ranges
from f
S
/2
to f
S
/2
) for LCD driver circuits, and a
selectable frequency signal (ranges from f
S
/2
to
f
S
/2
) for the buzzer output by mask option. It is
recommended to select a near 4kHz signal to
LCD driver circuits for proper display.
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