參數(shù)資料
型號(hào)： HT48R12-18DIP-F-0
英文描述： IC-8-BIT MCU
中文描述： 集成電路8位微控制器
文件頁(yè)數(shù)： 36/59頁(yè)
文件大?。?/td> 2625K
代理商： HT48R12-18DIP-F-0
CPLA [m]
Description
Complement data memory and place result in the accumulator
E ach bit of the specified data memory is logically complemented (1’s comple-
ment). Bits which previously contained a one are changed to zero and
vice-versa. The complemented result is stored in the accumulator and the
contents of the data memory remain unchanged.
ACC
←
[m]
Operation
Affected flag(s)
TC2
TC1
TO
PD
OV
Z
AC
C
–
–
–
–
–
√
–
–
DAA [m]
Description
Decimal-Adjust accumulator for addition
The accumulator value is adjusted to the BCD (Binary Code Decimal) code.
The accumulator is divided into two nibbles. E ach nibble is adjusted to the
BCD code and an internal carry (AC1) will be done if the low nibble of the
accumulator is greater than 9. The BCD adjustment is done by adding 6 to
the original value if the original value is greater than 9 or a carry (AC or C)
is set; otherwise the original value remains unchanged. The result is stored
in the data memory and only the carry flag (C) may be affected.
If ACC.3~ACC.0 >9 or AC=1
then [m].3~[m].0
←
(ACC.3~ACC.0)+6, AC1=AC
else [m].3~[m].0)
←
(ACC.3~ACC.0), AC1=0
and
If ACC.7~ACC.4+AC1 >9 or C=1
then [m].7~[m].4
←
ACC.7~ACC.4+6+AC1,C=1
else [m].7~[m].4
←
ACC.7~ACC.4+AC1,C=C
Operation
Affected flag(s)
TC2
TC1
TO
PD
OV
Z
AC
C
–
–
–
–
–
–
–
√
DEC [m]
Description
Operation
Affected flag(s)
Decrement data memory
Data in the specified data memory is decremented by one.
[m]
←
[m]–1
TC2
TC1
TO
PD
OV
Z
AC
C
–
–
–
–
–
√
–
–
HT48CXX/HT48RXX
36
25th May ’99
相關(guān)PDF資料
PDF描述
HT48R12-24SDIP-B-0 IC-8-BIT MCU
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HT48R12-24SDIP-B-0 制造商:未知廠家 制造商全稱:未知廠家 功能描述:IC-8-BIT MCU
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HT48R31 制造商:HOLTEK 制造商全稱:Holtek Semiconductor Inc 功能描述:8-Bit Microcontroller Series
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