參數(shù)資料
型號(hào): HT48R12-18DIP-F-0
英文描述: IC-8-BIT MCU
中文描述: 集成電路8位微控制器
文件頁(yè)數(shù): 35/59頁(yè)
文件大小: 2625K
代理商: HT48R12-18DIP-F-0
CLR WDT1
Description
Preclear watchdog timer
The TD, PD flags, WDT and the WDT Prescaler has cleared (re-counting from
zero), if the other preclear WDT instruction has been executed. Only execu-
tion of this instruction without the other preclear instruction sets the indi-
cated flag which implies that this instruction has been executed and the TO
and PD flags remain unchanged.
WDT and WDT Prescaler
00H*
PD and TO
0*
Operation
Affected flag(s)
TC2
TC1
TO
PD
OV
Z
AC
C
0*
0*
CLR WDT2
Description
Preclear watchdog timer
The TO, PD flags, WDT and the WDT Prescaler are cleared (re-counting from
zero), if the other preclear WDT instruction has been executed. Only execu-
tion of this instruction without the other preclear instruction sets the indi-
cated flag which implies that this instruction has been executed and the TO
and PD flags remain unchanged.
WDT and WDT Prescaler
00H*
PD and TO
0*
Operation
Affected flag(s)
TC2
TC1
TO
PD
OV
Z
AC
C
0*
0*
CPL [m]
Description
Complement data memory
E ach bit of the specified data memory is logically complemented (1’s comple-
ment). Bits which previously contained a one are changed to zero and
vice-versa.
[m]
[m]
Operation
Affected flag(s)
TC2
TC1
TO
PD
OV
Z
AC
C
HT48CXX/HT48RXX
35
25th May ’99
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