參數(shù)資料
型號(hào)： HT48CA3
廠(chǎng)商： Holtek Semiconductor Inc.
英文描述： 8-Bit Remote Type MCU
中文描述： 8位遙控型單片機(jī)
文件頁(yè)數(shù)： 13/36頁(yè)
文件大?。?/td> 271K
代理商： HT48CA3
HT48CA3
Rev. 1.40
13
July 16, 2003
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Timer/Event Counter 0
There are 3 registers related to Timer/Event Counter 1;
TMR1H(0FH), TMR1L(10H), TMR1C(11H). Writing
TMR1L will only put the written data to an internal
lower-order byte buffer (8 bits) and writing TMR1H will
transfer the specified data and the contents of the
lower-order byte buffer to TMR1H and TMR1L preload
registers, respectively. The Timer/Event Counter 1
preload register is changed by each writing TMR1H op-
erations. Reading TMR1H will latch the contents of
TMR1H and TMR1L counters to the destination and the
lower-order byte buffer, respectively. Reading the
TMR1L will read the contents of the lower-order byte
buffer. The TMR1C is the Timer/Event Counter 1 control
register, which defines the operating mode, counting en-
able or disable and active edge.
The TM0, TM1 bits define the operating mode. The
event count mode is used to count external events,
which means the clock source comes from an external
(TMR1) pin. The timer mode functions as a normal timer
with the clock source coming from the instruction clock.
The pulse width measurement mode can be used to
count the high or low level duration of the external signal
(TMR1).Thecountingisbasedontheinstructionclock.
In the event count or timer mode, once the Timer/Event
Counter 1 starts counting, it will count from the current
contents in the Timer/Event Counter 1 to FFFFH. Once
overflow occurs, the counter is reloaded from the
Timer/Event Counter 1 preload register and generates
the corresponding interrupt request flag (T1F;bit 6 of
INTC) at the same time.
In pulse width measurement mode with the TON and TE
bits are equal to one, once the TMR1 has received a
transitionfromlowtohigh(orhightolowiftheTEbitis0)
it will start counting until the TMR1 returns to the original
level and reset the TON. The measured result will re-
main in the Timer/Event Counter 1 even if the activated
transition occurs again. In other words, only one cycle
measurement can be done. Until setting the TON, the
cycle measurement will function again as long as it re-
ceives further transition pulse. Note that, in this operat-
ing mode, the Timer/Event Counter 1 starts counting not
according to the logic level but according to the transi-
tion edges. In the case of counter overflows, the counter
1 is reloaded from the Timer/Event Counter 1 preload
register and issues the interrupt request just like the
other two modes.
Toenablethecountingoperation,thetimerONbit(TON;
bit 4 of TMR1C) should be set to 1. In the pulse width
measurement mode, the TON will be cleared automati-
callyafterthemeasurementcycleiscomplete.Butinthe
other two modes the TON can only be reset by instruc-
tions. The overflow of the Timer/Event Counter 1 is one
of the wake-up sources. No matter what the operation
mode is, writing a 0 to ET1I can disabled the corre-
sponding interrupt service.
In the case of Timer/Event Counter 1 OFF condition,
writing data to the Timer/Event Counter 1 preload regis-
ter will also load the data to Timer/Event Counter 1. But
if the Timer/Event Counter 1 is turned on, data written to
the Timer/Event Counter 1 will only be kept in the
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Timer/Event Counter 1
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