參數(shù)資料
型號: HT48C10
廠商: Holtek Semiconductor Inc.
英文描述: 8-Bit Microcontroller Series
中文描述: 8位微控制器系列
文件頁數(shù): 17/59頁
文件大?。?/td> 2625K
代理商: HT48C10
(TMR0C;0E H) and timer/event counter 1 con-
trol register (TMR1C;11H). Fifth, the entire
number of I/O registers is expanded from 3 to 6
(PA;12H,PB;14H,PC;16H,PD;18H,PE ;1AH,
PF;1CH,PG; 1E H). Finally, the number of I/O
control registers is also doubled (PAC;13H,
P B C ;15H ,PC C ;17H ,PD C ;19H ,PE C ;1B H ,
PFC;1DH,PGC;1FH). The remaining space be-
fore the 20H of the four microcontrollers are all
reserved for future expansion usage. Reading
these remaining locations will return the result
to 00H. The general purpose data memory, ad-
dressed from 40H~7F H of the HT 48C10,
20H~7FH of the HT48C30, 60H~FFH of the
HT48C50, or 20H~FFH of the HT48C70 accord-
ing to the microcontroller selected, is used for
data and control information under instruction
commands.
All the RAM areas can directly execute arithme-
tic, logic, increment, decrement, and rotate op-
erations. E xcept some dedicated bits, each bit in
the RAM can be set and reset by the SE T [m].i
and CLR [m].i instructions, respectively. These
RAM areas are indirectly accessible through the
memory pointer register(s) MP (01H) of the
HT48C10/HT48C30 or MP0 (01H) and MP1
(03H) of the HT48C50/HT48C70.
Indirect addressing register
Of the four microcontrollers, the HT48C10/
HT48C30 make use of location 00H whereas the
HT48C50/HT48C70 of locations 00H and 02H
as indirect addressing registers that are not
physically implemented. Any read/write opera-
tion of [00H] or of [00H] and [02H] accesses the
RAM pointed to by MP (01H) or by MP0 (01H)
and MP1 (03H) respectively according to the
microcontroller chosen. Reading location 00H or
02H indirectly will return the result 00H. Writ-
ing it indirectly will, result to no operation.
The function of data movement between two
indirect addressing registers is not supported.
T he memory pointer register MP of the
HT48C10/HT48C30 or MP0 and MP1 of the
HT48C50/HT48C70 are of 7 bits or 8 bits wide
respectively, and can be used to access the RAM
by combining the corresponding indirect ad-
dressing registers. T he bit 7 of MP
(HT48C10/HT48C30) is undefined and reading
will return the result “1”. Any writing operation to
MP will only transfer the lower 7-bit data to MP.
Accumulator ACC
The accumulator (ACC) relates to the ALU op-
erations. It is also mapped to location 05H of the
RAM and is capable of operating with immedi-
ate data. The data movement between two data
memories will pass through the ACC.
Arithmetic and logic unit – ALU
This circuit performs 8-bit arithmetic and logic
operations. It provides the following functions:
Arithmetic operations (ADD, ADC, SUB,
SBC, DAA)
Logic operations (AND, OR, XOR, CPL)
Rotation (RL, RR, RLC, RRC)
Increment and Decrement (INC, DE C)
Branch decision (SZ, SNZ, SIZ, SDZ, etc.)
The ALU saves the results of the data operation
and change the status register as well.
Status register – STATUS
The status register (0AH) is of 8 bits wide and
consists of a zero flag (Z), a carry flag (C), an
auxiliary carry flag (AC), an overflow flag (OV),
a power down flag (PD), and a watchdog time-
out flag (TO). The register also records the status
information and controls the operation sequence.
E xcept the TO and PD flags, bits in the status
register can all be altered by instructions, simi-
lar to the case with other registers. Any data
written into the status register will not change
the TO or PD flags. But the operations related
to the status register may lead to different re-
sults from those intended. The TO and PD flags
can be changed by system power up, Watchdog
Timer overflow, executing the HALT instruc-
tion, or clearing the Watchdog Timer. The Z, OV,
AC, and C flags all reflect the status of the
latest operations.
HT48CXX/HT48RXX
17
25th May ’99
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