參數(shù)資料
型號: HSP50306SC-25
廠商: INTERSIL CORP
元件分類: 通信及網(wǎng)絡(luò)
英文描述: Digital QPSK Demodulator
中文描述: SPECIALTY TELECOM CIRCUIT, PDSO16
封裝: SOIC-16
文件頁數(shù): 5/8頁
文件大小: 37K
代理商: HSP50306SC-25
8-276
Two Versions: Different Applications
The -27 and -25 versions of the HSP50306 Digital QPSK
Demodulator are not simply different speed grades of the
same device, but are designs which have proportionally
scaled clocks and bandwidths for different applications.
NOTE: While these parts are pin for pin compatible, in
most applications they cannot be used as functional
equivalent substitutes for each other.
Key differences are:
The -27 version of the HSP50306 has an input IF of
10.7MHz with an input clock of 26. 97MHz.
The -25 version of the HSP50306 has an input IF of
2.1MHz with an input clock of 25. 6MHz.
In both the -27 and -25 designs, the sample rate clock for the
input IF signal is half of the CLK frequency.
NOTE: Sample
rate clock is designated by f
S
= f
CLK
/2.
Aside from input
IF and input clock, all other performance parameters of the
two parts are identical for their respective IF inputs.
10.7MHz Input IF Applications
Both the -27 and -25 parts can be used in 10.7MHz IF Applica-
tions. Figures 3 and 4 show the frequency spectrum for the
sampled 10.7MHz IF input signals for both the -27 and -25 ver-
sions, respectively. In the 10.7MHz IF Application, the -25 ver-
sion offers tighter filtering capability than the -27 version
because the lower IF allows use of low pass filtering. Also, the
lower IF of the -25 version has inherently lower internal pro-
cessing spectral spurs than the -27 version. Note that the
receive IF for the HSP50306SC-27 is the input IF to the demod-
ulator. For the HSP50306SC-25, the receive IF is 10.7MHz, but
the processing is done on the spectral image at 2.1MHz. Exam-
ine the spectral inversion between the 10.7MHz Receive IF and
the 2.1MHz demodulator input in Figure 4.
The transmit differ-
ential encoder must take into account this spectral rever-
sal.
The required encoding is shown in Table 3. This part was
designed to be paired with the HSP50307 Burst Modulator, and
can be operated from the same 25.6MHz reference clock.
TABLE 3. DIFFERENTIAL ENCODING REQUIRED FOR THE -27
AND -25 DEMODULATORS RECEIVING 10.7MHz IF
INPUT
BITS
PHASE CHANGE
REQUIRED FOR -27
DEMODULATION
PHASE CHANGE
REQUIRED FOR -25
DEMODULATION
00
0
o
0
o
01
-90
o
90
o
10
90
o
-90
o
11
180
o
180
o
FIGURE 3. SAMPLED SPECTRUM FOR THE -27 VERSIONS
(f
CLK
= 26.97MHz)
RECEIVE IF
DEMOD INPUT IF
DC
10.7 F
S
16.27
24.19 F
CLK
29.76
2.79
FIGURE 4. SAMPLED SPECTRUM FOR THE -25 VERSIONS
(f
CLK
= 25.6MHz)
RECEIVE IF
DEMOD INPUT IF
DC
10.7 F
S
14.9
23.5 F
CLK
27.7
2.1
HSP50306
相關(guān)PDF資料
PDF描述
HSP50306SC-2596 Digital QPSK Demodulator
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HSP50306SC-2796 Digital QPSK Demodulator
HSP50306 Digital QPSK Demodulator(數(shù)字QPSK解調(diào)器)
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相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
HSP50306SC-2596 制造商:INTERSIL 制造商全稱:Intersil Corporation 功能描述:Digital QPSK Demodulator
HSP50306SC-27 制造商:Rochester Electronics LLC 功能描述:QPSK DEMODULATOR 16 LEAD SOIC - Bulk
HSP50306SC-27 WAF 制造商:Intersil Corporation 功能描述:
HSP50306SC-2796 制造商:Rochester Electronics LLC 功能描述:- Bulk
HSP50307 制造商:INTERSIL 制造商全稱:Intersil Corporation 功能描述:Burst QPSK Modulator