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參數資料
| 型號： | HSP50016GC-52 |
| 廠商： | INTERSIL CORP |
| 元件分類： | 數字信號處理外設 |
| 英文描述： | Digital Down Converter |
| 中文描述： | DSP-MIXER, CPGA48 |
| 封裝： | CERAMIC, PGA-48 |
| 文件頁數： | 24/31頁 |
| 文件大?。?/td> | 209K |
| 代理商： | HSP50016GC-52 |
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3-221
Up Conversion by f”/2
This operation allows the user to exchange the positions of
the upper and lower halves of a down converted signal
while leaving each half unchanged. Quadrature up
conversion by f”/2 is performed by multiplying the output
signal by e
j2
π
nf’’/2
= cos(2pnf”/2) + j sin(2pnf”/2). When
sampled at a rate of f”, cos(2pnf”/2) takes on the values 1,
-1, 1, -1,... and sin(2pnf”/2) always = 0. Thus, the up
convert LO sequence is:
This sequence is multiplied by the output of the I and Q
branches of the filter:
w(n) = cos((
ω
k
-
ω
c
)n) + jsin((
ω
k
-
ω
c
)n)
= e
j(
ω
k
-
ω
c
)n
,
yielding an output sequence:
The Formatter contains the circuitry to shift the quadrature
output spectrum up by one half of the output sample
frequency f”. This operation is independent of the function of
the Phase Generator and Mixer. The spectra of the outputs
of the Filter and Formatter are shown in Figure 18.
The setup is identical to the down conversion configuration,
except that the Up Convert Bit is set in Control Word 4.
0
f”/4
f”/2
-f”/4
-f”/2
0
f”/4
f’
8
f
S
8R
f”/2
f’
4
f
S
4R
-f”/4
-f’
8
-f
S
8R
-f”/2
-f’
4
-f
S
4R
0
f”/4
f”/2
-f”/4
-f”/2
B. FIRST OPERATION IN FORMATTER:
UP CONVERT BY SAMPLE FREQUENCY / 4
A. OUTPUT OF FIR FILTERS: SIGNAL OVERSAMPLED BY 2
C. SECOND OPERATION IN FORMATTER: I OUTPUT = I + Q
FIGURE 17. QUADRATURE TO REAL CONVERSION OF AN OUTPUT SIGNAL
-f’
4
-f
S
4R
-f’
8
-f
S
8R
f’
8
f
S
8R
f’
4
f
S
4R
-f’
4
-f
S
4R
-f’
8
-f
S
8R
f’
8
f
S
8R
f’
4
f
S
4R
f
S
= f
1
’R
f
1
’ = 2f”
e
j
π
n
= 1 + j0, -1 + j0, 1 + j0, …
(EQ. 24)
(EQ. 25)
y = (RE(w(n)), IM(w(n))),
(EQ. 26)
-RE(w(n+1)), - IM(w(n+1))),
RE(w(n+2)), IM(w(n+2))), …
0
f”/4
f”/2
-f”/4
-f”/2
0 f”/4
f”/2
-f”/4
-f”/2
B. FILTER OUTPUT UP CONVERTED BY
OUTPUT SAMPLE FREQUENCY / 2
A. OUTPUT OF FIR FILTERS
FIGURE 18. UP CONVERSION BY F” / 2
HSP50016
相關PDF資料 |
PDF描述 |
|---|---|
| HSP50016-EV | DDC Evaluation Platform |
| HSP50016JC-52 | Digital Down Converter |
| HSP50016JC-75 | Digital Down Converter |
| HSP50110JC-60 | Communications Tuner Circuit |
| HSP50306SC-25 | Digital QPSK Demodulator |
相關代理商/技術參數 |
參數描述 |
|---|---|
| HSP50016JC-52 | 功能描述:上下轉換器 DIGITAL DOWN CONVERTER 44 PLCC, 52MHZ, COMM RoHS:否 制造商:Texas Instruments 產品:Down Converters 射頻:52 MHz to 78 MHz 中頻:300 MHz LO頻率: 功率增益: P1dB: 工作電源電壓:1.8 V, 3.3 V 工作電源電流:120 mA 最大功率耗散:1 W 最大工作溫度:+ 85 C 安裝風格:SMD/SMT 封裝 / 箱體:PQFP-128 |
| HSP50016JC-5296 | 制造商:Rochester Electronics LLC 功能描述:TAPE AND REEL OF HSP50016JC-52 - Bulk |
| HSP50016JC-75 | 制造商:Rochester Electronics LLC 功能描述:DIGITAL DOWN CONVERTER 44 PLCC 75MHZ COMM - Bulk |
| HSP50016JI-52 | 制造商:Rochester Electronics LLC 功能描述:DIGITAL DOWN CONVERTER 44 PLCC, 52MHZ, COMM,INDS - Bulk |
| HSP50016JM-5296R3571 | 制造商:Intersil Corporation 功能描述:ROCKWELL HSP50016JC-5296 W/BRAND,-55/+125C OP TEMP,ELECTR - Tape and Reel |
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