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參數(shù)資料
| 型號： | HS9-RTX2010RH-8 |
| 廠商： | INTERSIL CORP |
| 元件分類： | 微控制器/微處理器 |
| 英文描述： | Radiation Hardened Real Time Express⑩ Microcontroller |
| 中文描述： | 16-BIT, 8 MHz, MICROCONTROLLER, CQFP84 |
| 封裝： | CERAMIC, QFP-84 |
| 文件頁數(shù)： | 4/36頁 |
| 文件大?。?/td> | 406K |
| 代理商： | HS9-RTX2010RH-8 |
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4
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
L6
L8
K8
L9
L10
K9
L11
K10
J10
K11
J11
H10
H11
F10
G10
G11
G9
F9
F11
MA11
MA12
MA13
VDD
MA14
MA15
MA16
MA17
MA18
MA19
GND
LDS
UDS
NEW
BOOT
PCLK
MR/W
MD00
MD01
Output; Address Bus
Output; Address Bus
Output; Address Bus
Power
Output; Address Bus
Output; Address Bus
Output; Address Bus
Output; Address Bus
Output; Address Bus
Output; Address Bus
Ground
Output
Output
Output
Output
Output
Output
I/O; Data Bus
I/O; Data Bus
PGA And CQFP
Pin/Signal Assignments
(Continued)
CQFP
PGA
PIN
SIGNAL
NAME
TYPE
66
67
68
69
70
71
72
73
74
75
76
77
78
79
80
81
82
83
84
-
E11
E10
E9
D11
D10
C11
B11
C10
A11
B10
B9
A10
A9
B8
A8
B6
B7
A7
C7
C3
MD02
MD03
MD04
GND
MD05
MD06
MD07
VDD
MD08
MD09
MD10
MD11
MD12
MD13
MD14
GND
MD15
GA00
GA01
-
I/O; Data Bus
I/O; Data Bus
I/O; Data Bus
Ground
I/O; Data Bus
I/O; Data Bus
I/O; Data Bus
Power
I/O; Data Bus
I/O; Data Bus
I/O; Data Bus
I/O; Data Bus
I/O; Data Bus
I/O; Data Bus
I/O; Data Bus
Ground
I/O; Data Bus
Output; Address Bus
Output; Address Bus
Isolated Alignment Pin
PGA And CQFP
Pin/Signal Assignments
(Continued)
CQFP
PGA
PIN
SIGNAL
NAME
TYPE
Output Signal Descriptions
SIGNAL
CQFP
RESET
LEVEL
DESCRIPTION
OUTPUTS
NEW
60
1
NEW: A HIGH on this pin indicates that an Instruction Fetch is in progress.
BOOT
61
1
BOOT: A HIGH on this pin indicates that Boot Memory is being accessed. This pin can be set or reset by accessing
bit 3 of the Configuration Register.
MR/W
63
1
MEMORY READ/WRITE: A LOW on this pin indicates that a Memory Write operation is in progress.
UDS
59
1
UPPER DATA SELECT: A HIGH on this pin indicates that the high byte of memory (MD15-MD08) is being
accessed.
LDS
58
1
LOWER DATA SELECT: A HIGH on this pin indicates that the low byte of memory (MD07-MD00) is being
accessed.
GIO
16
1
ASIC I/O: A LOW on this pin indicates that an ASIC Bus operation is in progress.
GR/W
15
1
ASIC READ/WRITE: A LOW on this pin indicates that an ASIC Bus Write operation is in progress.
PCLK
62
0
PROCESSOR CLOCK: Runs at half the frequency of ICLK. All processor cycles begin on the rising edge of PCLK.
Held low extra cycles when WAIT is asserted.
TCLK
2
0
TIMING CLOCK: Same frequency and phase as PCLK but continues running during Wait cycles.
INTA
3
0
INTERRUPT ACKNOWLEDGE: A HIGH on this pin indicates that an Interrupt Acknowledge cycle is in progress.
Input Signal, Bus, and Power Connection Descriptions
SIGNAL
CQFP
LEAD
DESCRIPTION
INPUTS
WAIT
13
WAIT: A HIGH on this pin causes PCLK to be held LOW and the current cycle to be extended.
ICLK
14
INPUT CLOCK: Internally divided by 2 to generate all on-chip timing (CMOS input levels).
RESET
12
A HIGH level on this pin resets the RTX. Must be held high for at least 4 rising edges of ICLK plus 12 ICLK cycle
setup and hold times.
HS-RTX2010RH
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| HS-RTX2010RH | Radiation Hardened Real Time Express⑩ Microcontroller |
| HS8-RTX2010RH | Radiation Hardened Real Time Express⑩ Microcontroller |
| HS9-RTX2010RH | Radiation Hardened Real Time Express⑩ Microcontroller |
| HS8-RTX2010RH-Q | Radiation Hardened Real Time Express⑩ Microcontroller |
| HS9-RTX2010RH-Q | Radiation Hardened Real Time Express⑩ Microcontroller |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| HS9-RTX2010RH-Q | 制造商:INTERSIL 制造商全稱:Intersil Corporation 功能描述:Radiation Hardened Real Time Express⑩ Microcontroller |
| HS9S-117RH/PROTO | 制造商:Intersil Corporation 功能描述: |
| HS9S-117RH-8 | 制造商:Intersil Corporation 功能描述:REG STD LIN ADJ POS 1.2V TO 37V 1.25A 3PIN SOT-23 - Trays |
| HS9S-117RH-8S2740 | 制造商:Intersil Corporation 功能描述:RADIATION HARDENED LINEAR VOLTAGE REGULATOR, CLASS Q, 36MDC, - Trays |
| HS9S-117RHPROTO | 制造商:INTERSIL 制造商全稱:Intersil Corporation 功能描述:Radiation Hardened Adjustable Positive Voltage Regulator |
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