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designed to help the developers of embedded real-time
control systems get their designs to market quickly. The
environment includes the optimized ANSI C language
compiler, symbolic menu driven C language debugger, RTX
assembler, linker, profiler, and PROM programmer interface.
The HS-RTX2010RH TForth compiler from Intersil translates
Forth-83 source code to HS-RTX2010RH machine
instructions. This compiler also provides support for all of the
HS-RTX2010RH instructions specific to the processor’s
registers, peripherals, and ASIC Bus. See the tables in the
following sections for instruction set information.
TABLE 6. INSTRUCTION SET SUMMARY
NOTATIONS
DEFINITION
m-read
Read data (byte or word) from memory location addressed by contents of
Register into
Register.
m-write
Write contents (byte or word) of
Register into memory location addressed by contents of
NEXT
Register.
g-read
Read data from the ASIC address (address field ggggg of instruction) into
chip peripheral registers can be done with a g-read command.
Register. A read of one of the on-
g-write
Write contents of
peripheral registers can be done with a g-write command.
Register to ASIC address (address field ggggg of instruction). A write to one of the on-chip
u-read
Read contents (word only) of User Space location (address field uuuuu of instruction) into
Register.
u-write
Write contents (word only) of
Register into User Space location (address field uuuuu of instruction).
SWAP
Exchange contents of
and
registers.
DUP
Copy contents of
Register to
Register, pushing previous contents of
NEXT
onto Stack Memory.
OVER
Copy contents of
original contents of
Register to
Register to Stack Memory.
NEXT
Register, pushing original contents of
to
Register and
DROP
Pop Parameter Stack, discarding original contents of
and the original contents of the top Stack Memory location in
Register, leaving the original contents of
.
NEXT
in
inv
Perform 1’s complement on contents of
Register, if i bit in instruction is 1.
alu-op
Perform appropriate cccc or aaa ALU operation from Table 20 on contents of
and
registers.
shift
Perform appropriate shift operation (ssss field of instruction) from Table 21 on contents of
registers.
and/or
d
Push short literal d from ddddd field of instruction onto Parameter Stack (where ddddd contains the actual value of the
short literal). The original contents of
are pushed into
onto Stack Memory.
, and the original contents of.
are pushed
D
Push long literal D from next sequential location in program memory onto Parameter Stack. The original contents of
are pushed into
, and the original contents of
TOP
NEXT
are pushed onto Stack Memory.
R
Perform a Return From Subroutine if bit = 1.
NOTE:
All unused opcodes are reserved for future architectural enhancements.
TOP
TOP
TOP
TOP
TOP
TOP
TOP
TOP
NEXT
TOP
NEXT
NEXT
TOP
TOP
NEXT
TOP
NEXT
TOP
TOP
TOP
NEXT
TOP
NEXT
TOP
NEXT
NEXT
NEXT
TABLE 7. INSTRUCTION REGISTER BIT FIELDS (BY FUNCTION)
FUNCTION CODE
DEFINITION
ggggg
Address field for ASIC Bus locations
uuuuu
Address field for User Space memyyory locations
cccc aaa
ALU functions (see Table 20)
ddddd
Short literals (containing a value from 0 to 31)
ssss
Shift Functions (see Table 21)
HS-RTX2010RH