參數(shù)資料
型號: HS8-RTX2010RH-Q
廠商: INTERSIL CORP
元件分類: 微控制器/微處理器
英文描述: Radiation Hardened Real Time Express⑩ Microcontroller
中文描述: 16-BIT, 8 MHz, MICROCONTROLLER, CPGA85
封裝: PGA-85
文件頁數(shù): 25/36頁
文件大?。?/td> 406K
代理商: HS8-RTX2010RH-Q
25
These inputs can be treated as either signed (two’s
complement) or unsigned integers, depending on the form of
the instruction used. In addition, if the ROUND option is
selected, the Multiplier can round the result to 16 bits. Note
that the MAC instructions do not pop the Parameter Stack;
the contents of
and
TOP
NEXT
remain intact.
For the Multiplier, the product is read from the Multiplier High
Product Register,
, which contains the upper 16 bits of
the product, and the Multiplier Low Product Register,
which contains the lower 16 bits. For the Multiplier-
Accumulator, the accumulated product is read from the
Multiplier Extension Register,
upper 16 bits, the
, which contains the middle 16 bits,
and the
, which contains the low 16 bits. The registers
may be read in any order, and there is no requirement that
all registers be read. Reading from any of the three registers
moves its value into
, and pushes the original value in
into
. If the read is from
original value of
is lost, i.e. it is not pushed onto stack
memory. This permits overwriting the original operands left
in
and
, which are not popped by the MAC
operations. If the read is from
is pushed onto the stack. In addition to this, any of the
three MAC registers can be directly loaded from
pops
into
and the Parameter Stack into
NEXT
TOP
,
, which contains the
or
, the
, the original value of
. This
NEXT
.
If 32-bit precision is not required, the multiplier output may be
rounded to 16 bits. This is accomplished by setting the ROUND
bit in the Interrupt Base/Control Register,
ROUND bit is set to 1, all operations that use the Multiplier
automatically round the least significant 16 bits of the result into
the most significant 16 bits. The rounding is achieved by adding
8000H to the least significant 16 bits (during the same cycle as
the multiply). Thus, if the ROUND bit is set:
, to 1. If the
1. If the most significant bit of the
is incremented.
2. If the most significant bit of the
is left unchanged.
The ROUND bit functions independently of whether the
signed or unsigned bit is used.
is set (1), the
is not set (0), the
The multiply instructions suppress interrupts during the
multiplication cycle. Reading
suppresses interrupts during the read. This allows a
multiplication operation to be performed, and both the upper
and lower registers to be read sequentially, with no danger of
a non-NMI interrupt service routine corrupting the contents
of the registers between reads. The multiply-accumulate
instructions do not suppress interrupts during instruction
execution.
, or
also
For additional information on the HS-RTX2010RH MAC see
the Programmer’s Reference Manual.
The HS-RTX2010RH On-Chip Barrel Shifter And
Leading Zero Detector
The HS-RTX2010RH has both a 32-bit Barrel Shifter and a
32-bit Leading Zero Detector for added floating-point and
DSP performance. The inputs to the Barrel Shifter and
Leading Zero Detector are the top two elements of the
Parameter Stack, the
and
TOP
registers.
The Barrel Shifter uses a 5-bit count stored in the
Register to determine the number of places to right or left
shift the double word operand contained in the
registers. The output of the Barrel Shifter is stored in
the
and
registers, with the top 16 bits in
and the bottom 16 bits in
MLR
and
.
NEXT
S
T
M
T
M
T
MLR
MHR
MXR
16
16
DATA STACK
ASIC BUS
5
32
MAC
16 x 16
TOP
32-BIT BRL SHIFTER
32-BIT LZD
REGISTER
48
FIGURE 25. HS-RTX2010RH FLOATING POINT/DSP LOGIC
MHR
MLR
MXR
MHR
MLR
TOP
TOP
NEXT
MHR
MLR
NEXT
TOP
NEXT
MXR
NEXT
TOP
IBC
MLR
MHR
MLR
MHR
MHR
MLR
NEXT
MXR
TOP
NEXT
MHR
MLR
MHR
HS-RTX2010RH
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