參數(shù)資料
型號(hào)： HPC-DEV-WDBC
廠(chǎng)商： National Semiconductor Corporation
英文描述： High-Performance microController with A/D
中文描述： 高性能微控制器/數(shù)
文件頁(yè)數(shù)： 29/39頁(yè)
文件大?。?/td> 430K
代理商： HPC-DEV-WDBC
Memory
The HPC46164 has been designed to offer flexibility in
memory usage. A total address space of 64 kbytes can be
addressed with 16 kbytes of ROM and 512 bytes of RAM
available on the chip itself. The ROM may contain program
instructions, constants or data. The ROM and RAM share
the same address space allowing instructions to be execut-
ed out of RAM.
Program memory addressing is accomplished by the 16-bit
program counter on a byte basis. Memory can be addressed
directly by instructions or indirectly through the B, X and SP
registers. Memory can be addressed as words or bytes.
Words are always addressed on even-byte boundaries. The
HPC46164 uses memory-mapped organization to support
registers, I/O and on-chip peripheral functions.
The
64 kbytes and registers and I/O are mapped as shown in
Table V.
HPC46164
memory
address
space
extends
to
TABLE V. HPC46164 Memory Map
FFFF:FFF0
FFEF:FFD0
FFCF:FFCE
:
Interrupt Vectors
JSRP Vectors
(
:
On-Chip ROM
*
C001:C000
USER MEMORY
BFFF:BFFE
:
0301:0300
:
External Expansion
Memory
02FF:02FE
:
:
On-Chip RAM
USER RAM
01C1:01C0
(
0195:0194
WATCHDOG Address
WATCHDOG Logic
0192
0191:0190
018F:018E
018D:018C
018B:018A
0189:0188
0187:0186
0185:0184
0183:0182
0181:0180
T0CON Register
TMMODE Register
DIVBY Register
T3 Timer
R3 Register
T2 Timer
R2 Register
I2CR Register/ R1
I3CR Register/ T1
I4CR Register
Timer Block T0:T3
015E:015F
015C
0153:0152
0151:0150
014F:014E
014D:014C
014B:014A
0149:0148
0147:0146
0145:0144
0143:0142
0141:0140
EICR
EICON
Port P Register
PWMODE Register
R7 Register
T7 Timer
R6 Register
T6 Timer
R5 Register
T5 Timer
R4 Register
T4 Timer
Timer Block T4:T7
0128
0126
0124
0122
0120
ENUR Register
TBUF Register
RBUF Register
ENUI Register
ENU Register
UART
011F:011E
011D:011C
011B:011A
0119:0118
0117:0116
0115:0114
0113:0112
0111:0110
0106
A/D Result Register 7
A/D Result Register 6
A/D Result Register 5
A/D Result Register 4
A/D Result Register 3
A/D Result Register 2
A/D Result Register 1
A/D Result Register 0
A/D Control Register 3
A to D
Registers
0104
Port D Input Register
0102
0100
A/D Control Register 2
A/D Control Register 1
A to D
Registers
00F5:00F4
00F3:00F2
00F1:00F0
BFUN Register
DIR B Register
DIR A Register / IBUF
PORTS A & B
CONTROL
00E6
UPIC Register
UPI CONTROL
00E3:00E2
00E1:00E0
Port B
Port A / OBUF
PORTS A & B
00DE
00DD:00DC
00D8
00D6
00D4
00D2
00D0
Reserved
HALT Enable Register
Port I Input Register
SIO Register
IRCD Register
IRPD Register
ENIR Register
PORT CONTROL
& INTERRUPT
CONTROL
REGISTERS
00CF:00CE
00CD:00CC
00CB:00CA
00C9:00C8
00C7:00C6
00C5:00C4
00C3:00C2
00C0
X Register
B Register
K Register
A Register
PC Register
SP Register
Reserved
PSW Register
HPC CORE
REGISTERS
00BF:00BE
:
0001:0000
On-Chip
RAM
:
USER RAM
*
Note:
The HPC46164 On-Chip ROM is on addresses C000:FFFF and the
External Expansion Memory is 0300:BFFF. The HPC46104 have no On-Chip
ROM, External Memory is 0300:FFFF.
29
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