參數(shù)資料
型號(hào)： HI7188IP
廠商： HARRIS SEMICONDUCTOR
元件分類： ADC
英文描述： 8-Channel, 16-Bit, High Precision, Sigma-Delta A/D Sub-System
中文描述： 8-CH 16-BIT DELTA-SIGMA ADC, SERIAL ACCESS, PDIP40
文件頁數(shù)： 6/22頁
文件大?。?/td> 156K
代理商： HI7188IP
7-1852
Absolute Maximum Ratings
Thermal Information
Supply Voltage
AV
DD
to AV
SS
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11V
DV
DD
to DGND. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .+5.5V
Analog Input Pins . . . . . . . . . . . . . . . . . . . . . . . . . . . . AV
SS
to AV
DD
Digital Input, Output and I/O Pins. . . . . . . . . . . . . . . DGND to DV
DD
ESD Tolerance (No Damage)
Human Body Model . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 500V
Machine Model . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 100V
Charged Device Model . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 500V
Operating Conditions
Operating Temperature Range. . . . . . . . . . . . . . . . . . -40
o
C to 85
o
C
Thermal Resistance (Typical, Note 1)
PDIP . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
MQFP . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Maximum Storage Temperature Range . . . . . . . . . .-65
o
C to 150
o
C
Maximum Junction Temperature . . . . . . . . . . . . . . . . . . . . . . . 150
o
C
Maximum Lead Temperature (Soldering 10s). . . . . . . . . . . . . 300
o
C
(MQFP - Lead Tips Only)
θ
JA
(
o
C/W)
50
80
CAUTION: Stresses above those listed in “Absolute Maximum Ratings” may cause permanent damage to the device. This is a stress only rating and operation
of the device at these or any other conditions above those indicated in the operational sections of this specification is not implied.
NOTE:
1.
θ
JA
is measured with the component mounted on an evaluation PC board in free air.
Electrical Specifications
AV
DD
= +5V, AV
SS
= -5V, DV
DD
= +5V, V
RHI
= +2.5V, V
RLO
= AGND, V
CM
= AGND, PGIA Gain = 1,
OSC
IN
= 3.6864MHz, Bipolar Input Range Selected
PARAMETER
TEST CONDITION
-40
o
C TO 85
o
C
UNITS
MIN
TYP
MAX
SYSTEM PERFORMANCE
Resolution
Dependent on Gain (Note 2)
-
-
16
Bits
Integral Non-Linearity, INL
F
S
= 25Hz, +FS, +MS, 0, -MS, -FS
End Point Line Method (Notes 3, 5, 6)
-
±
0.0015
±
0.0045
%FS
Differential Non-Linearity
(Note 2)
No Missing Codes to 16-Bits
-
Offset Error, V
OS
(Calibrated)
V
INHI
= V
INLO
(Notes 3, 4)
-
±
0.0015
-
%FS
Full Scale Error, FSE (Calibrated)
V
INHI
- V
INLO
= +2.5V (Notes 3, 4)
-
±
0.0015
-
%FS
Gain Error (Calibrated)
Slope = +Full Scale - (-Full Scale)
(Notes 3, 4)
-
±
0.0015
-
%FS
Noise, V
N(P-P)
-
1/4
-
LSB
Common Mode Rejection Ratio,
CMRR
V
CM
= 0V (Note 5) Delta V
CM
=
±
3V
-
-75
-
dB
Off Channel Isolation
(Note 2)
-120
-
-
dB
ANALOG INPUT
Common Mode Input Range, V
CM
(Note 2)
AV
SS
-
AV
DD
-
Input Leakage Current, I
IN
V
IN
= AV
DD
(Note 3)
-
-
1.0
nA
Input Capacitance, C
IN
(Note 2) See Table 2
-
4.0
pF
DIGITAL INPUTS
Input Logic High Voltage, V
IH
2.0
-
-
V
Input Logic Low Voltage, V
IL
-
-
0.8
V
Input Logic Current, I
I
V
IN
= 0V, +5V
-
1.0
10
μ
A
Input Capacitance, C
IN
V
IN
= 0V (Note 2)
-
5.0
-
pF
DIGITAL CMOS OUTPUTS
Output Logic High Voltage, V
OH
I
OUT
= -100
μ
A (Note 7)
2.4
-
-
V
Output Logic Low Voltage, V
OL
I
OUT
= 3.2mA (Note 7)
-
-
0.4
V
HI7188
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