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參數(shù)資料
| 型號(hào)： | HI7188IN |
| 廠商： | HARRIS SEMICONDUCTOR |
| 元件分類： | ADC |
| 英文描述： | 8-Channel, 16-Bit, High Precision, Sigma-Delta A/D Sub-System |
| 中文描述： | 8-CH 16-BIT DELTA-SIGMA ADC, SERIAL ACCESS, PQFP44 |
| 文件頁數(shù)： | 13/22頁 |
| 文件大?。?/td> | 156K |
| 代理商： | HI7188IN |
7-1859
Digital Section Description
A block diagram of the digital section of the HI7188 is shown
in Figure 11. This section includes an integrating filter, aver-
aging filters, calibration logic registers, output data RAM,
digital serial interface and a clock generator.
Integrating Filters
The integrating filter receives a stream of 1s and 0s from the
modulator at a rate of 614kHz. The 1’s density of this data
stream provides a digital representation of the analog input
signal. The integrating filter provides the low pass function
with a cutoff of 2kHz. The Integrating Filter works in concert
with the modulator and is controlled by the same clock and
reset signals. The filter integrates 201 1-bit samples from the
modulator for a valid “conversion” to be completed. At that
time the data is transferred to the Line Noise Rejection
(LNR) Filters or straight to calibration if LNR is not selected.
Line Noise Rejection
The line noise rejection section is used to eliminate a periodic
sine wave signal of either 50Hz or 60Hz line frequencies.
To understand the functionality of the HI7188 line noise
rejection (LNR), it is useful to discuss the method utilized by
a generic integrating analog to digital converter (ADC). This
ADC uses an external summing/integrating capacitor to sum
the line noise on a capacitor over one line noise cycle. The
cycle period is 16.67ms and 20ms for 60Hz and 50Hz
respectively. The ADC output is then the desired input with
the line noise summed to zero with a conversion rate equal
to the line noise frequency.
The HI7188 has the ability to do the same function as the Inte-
grating ADC but samples the input
four
times during the line
cycle (see Figure 12). For this discussion, the desired analog
input signal will be zero. The HI7188 accomplishes this by
instituting a four quadrant, four point running average system.
The microsequencer samples all eight inputs at exactly the
same point in time and for the exact amount of time for each
of the four quadrants of a single line cycle and stores them
separately. These four samples are then summed, on a per
channels basis, which results in the same answer of the line
synchronous noise as with the Integrating ADC.
PGIA
INTEGRATOR
COMPARATOR
V
RHI
V
RLO
DAC
V
IN
+
+
∫
FIGURE 10. SIMPLE MODULATOR BLOCK DIAGRAM
CONVERSION CONTROL
SERIAL
INTERFACE
CLOCK
GENERATOR
OSC1 OSC2
CA
EOS
MODE
CS
RST
RSTIO
SDIO
SDO
SCLK
CONTROL
REGISTER
24
CALIBRATION
REGISTERS
AND CONTROL
16
16
CH1
CH2
CH3
CH4
CH5
CH6
CH7
CH8
CH1
CH2
CH3
CH4
CH5
CH6
CH7
CH8
24
INTEGRATING
FILTER
23
FROM
ANALOG
SECTION
1
L
CCR REGISTERS
LOGICAL
CHANNEL
ADDRESS
FIGURE 11. DIGITAL BLOCK DIAGRAM
CH1
CH2
CH3
CH4
CH5
CH6
CH7
CH8
CH1
CH2
CH3
CH4
CH5
CH6
CH7
CH8
RAM0
RAM1
LOGICAL
CHANNELS
BYPASS
LNR
LINE NOISE FILTER
HI7188
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| HI7188IP | 制造商:Rochester Electronics LLC 功能描述:- Bulk 制造商:Analog Devices 功能描述:IC 16BIT ADC 7188 DIP40 制造商:Harris Corporation 功能描述: |
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| HI7190EVAL | 功能描述:EVALUATION PLATFORM HI7190 RoHS:否 類別:編程器，開發(fā)系統(tǒng) >> 評(píng)估板 - 模數(shù)轉(zhuǎn)換器 (ADC) 系列:- 產(chǎn)品培訓(xùn)模塊:Obsolescence Mitigation Program 標(biāo)準(zhǔn)包裝:1 系列:- ADC 的數(shù)量:1 位數(shù):12 采樣率（每秒）:94.4k 數(shù)據(jù)接口:USB 輸入范圍:±VREF/2 在以下條件下的電源（標(biāo)準(zhǔn)）:- 工作溫度:-40°C ~ 85°C 已用 IC / 零件:MAX11645 已供物品:板，軟件 |
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